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參數(shù)資料
| 型號(hào)： | B900M24FXX16I |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 0-BIT, 80 MHz, OTHER DSP, PQCC44 |
| 文件頁(yè)數(shù)： | 65/100頁(yè) |
| 文件大?。?/td> | 1547K |
| 代理商： | B900M24FXX16I |
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Lucent Technologies Inc.
67
Advance Data Sheet
B900
July 1999
Baseband Signal Processor
5 Software Architecture (continued)
5.4
Instruction Set Formats (continued)
5.4.6 Field Descriptions (continued)
DR Field: Specifies the data register.
F1 Field: Specifies the multiply/ALU function.
F2 Field: Specifies the special function to be
performed.
F3 Field: Specifies the operation in an F3 ALU
instruction.
Table 75. DR Field
DR Value
Register
0000
r0
0001
r1
0010
r2
0011
r3
0100
a0
0101
a0l
0110
a1
0111
a1l
1000
y
1001
yl
1010
p
1011
pl
1100
x
1101
pt
1110
pr
1111
psw
Table 76. F1 Field
F1
Operation
0000
0001
0010
0011
aD = p
p = x y
aD = aS + p
p = x y
aD = aS – p
p = x y
0100
0101
0110
0111
aD = p
aD = aS + p
nop
aD = aS – p
1000
1001
1010
1011
aD = aS | y
aD = aS ^ y
aS & y
aS – y
1100
1101
1110
1111
aD = y
aD = aS + y
aD = aS & y
aD = aS – y
Table 77. F2 Field
F2
Operation
0000
0001
0010
0011
aD = aS >> 1
aD = aS << 1
aD = aS >> 4
aD = aS << 4
0100
0101
0110
0111
aD = aS >> 8
aD = aS << 8
aD = aS >> 16
aD = aS << 16
1000
1001
1010
1011
aD = p
aDh = aSh + 1
aD = ~aS
aD = rnd(aS)
1100
1101
1110
1111
aD = y
aD = aS + 1
aD = aS
aD = –aS
Table 78. F3 Field
F3
Operation
1000
aD = aS[h, l]
|
{aT, IM16, p}
1001
aD = aS[h, l]
^
{aT, IM16, p}
1010
aS[h, l]
&
{aT, IM16, p}
1011
aS[h, l]
–
{aT, IM16, p}
1101
aD = aS[h, l]
+
{aT, IM16, p}
1110
aD = aS[h, l]
&
{aT, IM16, p}
1111
aD = aS[h, l]
–
{aT, IM16, p}
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