
AX88772
USB to 10/100 Fast Ethernet/HomePNA Controller
1 = Extended register capable
0 = Basic register capable only
7.1.3 PHY Identifier Register 1
Address 02h
Bit
Bit Name
15:0 OUI_MSB
Default
Description
003B hex, RO / PS
OUI most significant bits:
Bits 3 to 18 of the OUI are mapped to bits 15 to 0 of this register
respectively. The most significant two bits of the OUI are ignored.
7.1.4 PHY Identifier Register 2
Address 03h
Bit
Bit Name
15:10 OUI_LSB
Default
Description
00_0110, RO / PS
OUI least significant bits:
Bits 19 to 24 of the OUI are mapped to bits 15 to 10 of this register
respectively.
Vendor model number.
Model revision number.
9:4
3:0
VNDR_MDL
MDL_REV
00_0001, RO / PS
0001, RO / PS
7.1.5 Auto Negotiation Advertisement Register (ANAR)
Address 04h
Bit
Bit Name
15
NP
0, RO / PS
Default
Description
Next page indication:
0 = No next page available
The PHY does not support the next page function.
Acknowledgement:
1 = Link partner ability data reception acknowledged
0 = Not acknowledged
Remote fault:
1 = Fault condition detected and advertised
0 = No fault detected
Reserved:
Write as 0, read as “don’t care”.
Pause:
1 = Pause operation enabled for full-duplex links
0 = Pause operation not enabled
100BASE-T4 support:
0 = 100BASE-T4 not supported
100BASE-TX full-duplex support:
1 = 100BASE-TX full-duplex supported by this device
0 = 100BASE-TX full-duplex not supported by this device
100BASE-TX half-duplex support:
1 = 100BASE-TX half-duplex supported by this device
0 = 100BASE-TX half-duplex not supported by this device
10BASE-T full-duplex support:
1 = 10BASE-T full-duplex supported by this PHY
0 = 10BASE-T full-duplex not supported by this PHY
10BASE-T half-duplex support:
1 = 10BASE-T half-duplex supported by this PHY
0 = 10BASE-T half-duplex not supported by this PHY
Protocol selection bits:
14
ACK
0, RO
13
RF
0, RW
12:11 Reserved
X, RW
10
Pause
0, RW
9
T4
0, RO/PS
8
TX_FD
1, RW
7
TX_HD
1, RW
6
10_FD
1, RW
5
10_HD
1, RW
4:0
Selector
0_0001, RW
ASIX ELECTRONICS CORPORATION
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