參數(shù)資料
型號: AX88141
廠商: ASIX Electronics Corporation
英文描述: 100BASE-TX/FX PCI BUS FAST ETHERNET MAC CONTROLLER WITH POWER MANAGEMENT
中文描述: 100BASE-TX/FX PCI總線的快速以太網(wǎng)MAC控制器電源管理
文件頁數(shù): 22/43頁
文件大小: 308K
代理商: AX88141
AX88141 PRELIMINARY
ASIX ELECTRONICS CORPORATION
22
CONFIDENTIAL
3
R/W/C
TJT - Transmit Jabber Time-out
Indicates that the transmit jabber timer expired, meaning that the AX88141 transmitter had been excessively
active. The transmission process is aborted and placed in the stopped state. This event causes the transmit
jabber time-out TDES0<14> is set.
TU - Transmit Buffer Unavailable
Indicates that the next descriptor on the transmit list is owned by the host and cannot be acquired by the
AX88141.The transmission process is suspended. To resume processing transmit descriptors, the host should
change the ownership bit of the descriptor and then issue a transmit poll demand command.
TPS - Transmit Process Stopped
Asserts when the transmit process enters the stopped state.
TI - Transmit Interrupt
Indicates that a frame transmission was completed, while TDES1<31> is asserted in the first descriptor of the
frame.
2
R/W/C
1
R/W/C
0
R/W/C
Tab - 26 REG5 Status Register Description
4.2.9 Operation Mode Register (REG6)
1.
REG6 establishes the receive and transmit operating modes and commands.
2.
REG6 should be the last REG to be written as part of initialization.
Field
31
30
R/W/C
-
R/W
Description
Reserved
RA - Receive All
1
0
All incoming packets will be received
Filtering mode
29:23
22
-
Reserved.--Written as “0” for future compatibility concern.
TTM - Transmit Threshold Mode
1
Threshold is 10Mb/s
R/W
0
Threshold is 100Mb/s
1
0
Enable Store and Forward
Disable Store and Forward
21
R/W
SF - Store and Forward
20
19
-
Reserved.--Written as “0” for future compatibility concern.
HBD - Heartbeat Disable
1
0
1
Heartbeat Disable
Heartbeat Enable
MII port is selected.
R/W
18
R/W
PS - Port Select
0
N/A
17:16
15:14
-
Reserved.--Written as “0” for future compatibility concern.
TR - Threshold Control Bits
The threshold value has a direct impact on the AX88141 bus arbitration scheme . Transmission starts when the frame size
within the transmit FIFO is larger than the threshold. In addition, full frames with a length less than the threshold are also
transmitted. The transmit process must be in the stopped state to change these bits.
Controls the selected threshold level for the AX88141 transmit FIFO. Four threshold levels are allowed.
REG6<18>=0
REG6<18>=1
REG6<18>=1
REG6<21>
0
REG6<15:14>
00
REG6<22>=X
REG6<22>=1
REG6<22>=0
R/W
72
72
128
0
01
96
96
256
0
10
128
128
512
0
11
160
160
1024
1
XX
Store & Forward
Store & Forward
Store & Forward
1
0
1
0
Start Transmission
Stop Transmission
Enable force collision
Disable force collision
00 Normal
01 Internal Loop-back
10 External Loop-back
1
Full-Duplex
0
Half-Duplex
1
Accept broadcast packet
0
Reject broadcast packet
1
Enable Pass All Multicast
0
Disable Pass All Multicast
1
Indicates that any incoming valid frame is received, regardless
of its destination address.
13
R/W
ST - Start/Stop Transmission
12
R/W
FC - Force Collision Mode
11:10
R/W
OM - Operating Mode
9
R/W
FD - Full-Duplex Mode
8
R/W
RB - Receive broadcast packet
7
R/W
PM - Pass All Multicast
6
R/W
PR - Promiscuous Mode
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