Watchdog timer with 16-bi" />
參數(shù)資料
型號: ATTINY84A-CCU
廠商: Atmel
文件頁數(shù): 27/135頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 8K FLASH 15UFBGA
標(biāo)準(zhǔn)包裝: 490
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: USI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 12
程序存儲器容量: 8KB(4K x 16)
程序存儲器類型: 閃存
EEPROM 大小: 512 x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 15-UFBGA
包裝: 托盤
122
32015G–AVR32–09/09
AT32AP7001
13. Watchdog Timer (WDT)
Rev: 1.0.1
13.1
Features
Watchdog timer with 16-bit prescaler
13.2
Description
The Watchdog Timer (WDT) is fed from a 16-bit prescaler, which is clocked from the 32 kHz
oscillator. Any tapping of the prescaler can be selected as clock source for the WDT.The watch-
dog timer must be periodically reset by software within the timeout period, ot herwise, the device
is reset and starts executing from the boot vector. This allows the device to recover from a con-
dition that has caused the system to be unstable.
13.3
Block Diagram
Figure 13-1. Real Time Counter module block diagram
13.4
Product Dependencies
13.4.1
I/O Lines
None
13.4.2
Power Management
The WDT is continously clocked, and remains operating in all sleep modes. However, if the
WDT is enabled and the user tries to enter a sleepmode where the 32 KHz oscillator is turned off
the system will enter the STOP sleepmode instead. This is to ensure the WDT is still running.
13.4.3
Debug Operation
The watchdog timer is frozen during debug operation, unless the OCD system keeps peripherals
running in debug operation.
16-bit P res c a le r
32 K H z
WD T _ C L R
W a tc hdog
De te c to r
W D T _ CT RL
W a tc hdog
re s e t
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