參數(shù)資料
型號： ATTINY13
廠商： Atmel Corp.
元件分類： 8位微控制器
英文描述： -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash
中文描述： 位AVR微控制器具有8K字節(jié)的系統(tǒng)內(nèi)可編程閃存
文件頁數(shù)： 119/176頁
文件大?。?/td> 2962K
代理商： ATTINY13
47
2535J–AVR–08/10
ATtiny13
9.3.3
GIFR – General Interrupt Flag Register
Bits 7, 4:0 – Res: Reserved Bits
These bits are reserved bits in the ATtiny13 and will always read as zero.
Bit 6 – INTF0: External Interrupt Flag 0
When an edge or logic change on the INT0 pin triggers an interrupt request, INTF0 becomes set
(one). If the I-bit in SREG and the INT0 bit in GIMSK are set (one), the MCU will jump to the cor-
responding Interrupt Vector. The flag is cleared when the interrupt routine is executed.
Alternatively, the flag can be cleared by writing a logical one to it. This flag is always cleared
when INT0 is configured as a level interrupt.
Bit 5 – PCIF: Pin Change Interrupt Flag
When a logic change on any PCINT5:0 pin triggers an interrupt request, PCIF becomes set
(one). If the I-bit in SREG and the PCIE bit in GIMSK are set (one), the MCU will jump to the cor-
responding Interrupt Vector. The flag is cleared when the interrupt routine is executed.
Alternatively, the flag can be cleared by writing a logical one to it.
9.3.4
PCMSK – Pin Change Mask Register
Bits 7, 6 – Res: Reserved Bits
These bits are reserved bits in the ATtiny13 and will always read as zero.
Bits 5:0 – PCINT5:0: Pin Change Enable Mask 5:0
Each PCINT5:0 bit selects whether pin change interrupt is enabled on the corresponding I/O pin.
If PCINT5:0 is set and the PCIE bit in GIMSK is set, pin change interrupt is enabled on the cor-
responding I/O pin. If PCINT5:0 is cleared, pin change interrupt on the corresponding I/O pin is
disabled.
Bit
76543210
–
INTF0
PCIF
–––––
GIFR
Read/Write
R
R/W
RRRRR
Initial Value
00000000
Bit
76543210
–
PCINT5
PCINT4
PCINT3
PCINT2
PCINT1
PCINT0
PCMSK
Read/Write
R
R/W
Initial Value
00000000
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