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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | ATMEGA8HVA-4CKU |
| 寤犲晢锛� | Atmel |
| 鏂囦欢闋佹暩(sh霉)锛� | 21/196闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | MCU AVR 8K FLASH 4MHZ 36-LGA |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | MCU Product Line Introduction megaAVR Introduction |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 364 |
| 绯诲垪锛� | AVR® ATmega |
| 鏍稿績铏曠悊鍣細 | AVR |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 4MHz |
| 閫ｉ€氭€э細 | SPI |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰�(f霉)浣�锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 7 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 8KB锛�4K x 16锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶у皬锛� | 256 x 8 |
| RAM 瀹归噺锛� | 512 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 9 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 5x12b |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -20°C ~ 85°C |
| 灏佽/澶栨锛� | 36-LGA |
| 鍖呰锛� | 鎵樼洡 |
| 閰嶇敤锛� | ATSTK600-ND - DEV KIT FOR AVR/AVR32 ATSTK500-ND - PROGRAMMER AVR STARTER KIT |
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117
8024A鈥揂VR鈥�04/08
ATmega8HVA/16HVA
21. Voltage Reference and Temperature Sensor
21.1
Features
Accurate Voltage Reference of 1.100V
Internal Temperature Sensor
Possibility for Runtime Compensation of Temperature Drift in Both Voltage Reference and On-
chip Oscillators
External Decoupling for Optimum Noise Performance
Low Power Consumption
21.2
Overview
A low power band-gap reference provides ATmega8HVA/16HVA with an accurate On-chip volt-
age reference V
REF of 1.100V. This reference voltage is used as reference for the On-chip
Voltage Regulator, the V-ADC and the CC-ADC. The reference to the ADCs uses a buffer with
external decoupling capacitor to enable excellent noise performance with minimum power con-
sumption. The reference voltage V
REF_P/VREF_N to the CC-ADC is scaled to match the full scale
requirement at the current sense input pins. This configuration also enables concurrent opera-
tion of both V-ADC and CC-ADC.
To guarantee ultra low temperature drift after factory calibration, ATmega8HVA/16HVA features
a two-step calibration algorithm. The first step is performed at T
HOT掳C and the second at room
temperature. By default, Atmel factory calibration is performed at T
HOT掳C, and the result is stored
in the signature row. The value of T
HOT can also be found in the signature row. See 鈥漅eading the
Signature Row from Software鈥� on page 144 for details. The customer can easily implement the
second calibration step in their test flow. This requires an accurate input voltage and a stable
room temperature. Temperature drift after this calibration is guaranteed by design and charac-
terization to be less than 90 ppm/
掳C from -10掳C to 70掳C. The BG Calibration C Register can also
be altered runtime to implement temperature compensation in software. Very high accuracy for
any temperature inside the temperature range can thus be achieved at the cost of extra calibra-
tion steps.
ATmega8HVA/16HVA has an On-chip temperature sensor for monitoring the die temperature. A
voltage Proportional-To-Absolute-Temperature, V
PTAT, is generated in the voltage reference cir-
cuit and connected to the multiplexer at the V-ADC input. This temperature sensor can be used
for runtime compensation of temperature drift in both the voltage reference and the On-chip
Oscillator. To get the absolute temperature in degrees Kelvin, the measured V
PTAT voltage must
be scaled with the VPTAT factory calibration value stored in the signature row. See Section
鈥�26.2.5鈥� on page 144. for details.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| ATMEGA8HVA-4CKUR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 8KB FLSH 512B EE 1KB SRAM - 4 MHZ RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| ATMEGA8HVA-4TU | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 8KB, 512B EE 4MHz 1KB SRAM 1.8-9V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| ATMEGA8HVA-4TUR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 8KB FLSH 512B EE 1KB SRAM - 4 MHZ RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| ATMEGA8HVD-4MX | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 8KB, 512B EE 4MHz 1KB SRAM 2.1-8V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| ATMEGA8L-8AC | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 8K FLASH 512B EE 1K SRAM ADC 3V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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