- 鎮ㄧ従鍦ㄧ殑浣嶇疆锛�璨疯常IC缍� > PDF鐩寗1905 > ATMEGA8HVA-4CKU (Atmel)MCU AVR 8K FLASH 4MHZ 36-LGA PDF璩囨枡涓嬭級
鍙冩暩璩囨枡
| 鍨嬭櫉锛� | ATMEGA8HVA-4CKU |
| 寤犲晢锛� | Atmel |
| 鏂囦欢闋佹暩锛� | 138/196闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | MCU AVR 8K FLASH 4MHZ 36-LGA |
| 鐢㈠搧鍩硅〒妯″锛� | MCU Product Line Introduction megaAVR Introduction |
| 妯欐簴鍖呰锛� | 364 |
| 绯诲垪锛� | AVR® ATmega |
| 鏍稿績铏曠悊鍣細 | AVR |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 4MHz |
| 閫ｉ€氭€э細 | SPI |
| 澶栧湇瑷倷锛� | 娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁革細 | 7 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 8KB锛�4K x 16锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶�?銆�?/td> | 256 x 8 |
| RAM 瀹归噺锛� | 512 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 9 V |
| 鏁告摎杞夋彌鍣細 | A/D 5x12b |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -20°C ~ 85°C |
| 灏佽/澶栨锛� | 36-LGA |
| 鍖呰锛� | 鎵樼洡 |
| 閰嶇敤锛� | ATSTK600-ND - DEV KIT FOR AVR/AVR32 ATSTK500-ND - PROGRAMMER AVR STARTER KIT |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�绗�53闋�绗�54闋�绗�55闋�绗�56闋�绗�57闋�绗�58闋�绗�59闋�绗�60闋�绗�61闋�绗�62闋�绗�63闋�绗�64闋�绗�65闋�绗�66闋�绗�67闋�绗�68闋�绗�69闋�绗�70闋�绗�71闋�绗�72闋�绗�73闋�绗�74闋�绗�75闋�绗�76闋�绗�77闋�绗�78闋�绗�79闋�绗�80闋�绗�81闋�绗�82闋�绗�83闋�绗�84闋�绗�85闋�绗�86闋�绗�87闋�绗�88闋�绗�89闋�绗�90闋�绗�91闋�绗�92闋�绗�93闋�绗�94闋�绗�95闋�绗�96闋�绗�97闋�绗�98闋�绗�99闋�绗�100闋�绗�101闋�绗�102闋�绗�103闋�绗�104闋�绗�105闋�绗�106闋�绗�107闋�绗�108闋�绗�109闋�绗�110闋�绗�111闋�绗�112闋�绗�113闋�绗�114闋�绗�115闋�绗�116闋�绗�117闋�绗�118闋�绗�119闋�绗�120闋�绗�121闋�绗�122闋�绗�123闋�绗�124闋�绗�125闋�绗�126闋�绗�127闋�绗�128闋�绗�129闋�绗�130闋�绗�131闋�绗�132闋�绗�133闋�绗�134闋�绗�135闋�绗�136闋�绗�137闋�鐣跺墠绗�138闋�绗�139闋�绗�140闋�绗�141闋�绗�142闋�绗�143闋�绗�144闋�绗�145闋�绗�146闋�绗�147闋�绗�148闋�绗�149闋�绗�150闋�绗�151闋�绗�152闋�绗�153闋�绗�154闋�绗�155闋�绗�156闋�绗�157闋�绗�158闋�绗�159闋�绗�160闋�绗�161闋�绗�162闋�绗�163闋�绗�164闋�绗�165闋�绗�166闋�绗�167闋�绗�168闋�绗�169闋�绗�170闋�绗�171闋�绗�172闋�绗�173闋�绗�174闋�绗�175闋�绗�176闋�绗�177闋�绗�178闋�绗�179闋�绗�180闋�绗�181闋�绗�182闋�绗�183闋�绗�184闋�绗�185闋�绗�186闋�绗�187闋�绗�188闋�绗�189闋�绗�190闋�绗�191闋�绗�192闋�绗�193闋�绗�194闋�绗�195闋�绗�196闋�
46
8024A鈥揂VR鈥�04/08
ATmega8HVA/16HVA
11.3
Watchdog Timer
11.3.1
Features
Clocked from separate On-chip Oscillator
3 Operating modes
鈥揑nterrupt
鈥� System Reset
鈥� Interrupt and System Reset
Selectable Time-out period from 16 ms to 8s
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode
11.3.2
Overview
ATmega8HVA/16HVA has an Enhanced Watchdog Timer (WDT). The WDT counts cycles of the
Ultra Low Power RC Oscillator. The WDT gives an interrupt or a system reset when the counter
reaches a given time-out value. In normal operation mode, it is required that the system uses the
WDR - Watchdog Timer Reset - instruction to restart the counter before the time-out value is
reached. If the system doesn't restart the counter, an interrupt or system reset will be issued.
Figure 11-6. Watchdog Timer
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used
to wake the device from sleep-modes, and also as a general system timer. One example is to
limit the maximum time allowed for certain operations, giving an interrupt when the operation
has run longer than expected. In System Reset mode, the WDT gives a reset when the timer
expires. This is typically used to prevent system hang-up in case of runaway code. The third
mode, Interrupt and System Reset mode, combines the other two modes by first giving an inter-
rupt and then switch to System Reset mode. This mode will for instance allow a safe shutdown
by saving critical parameters before a system reset.
The Watchdog always on (WDTON) fuse, if programmed, will force the Watchdog Timer to Sys-
tem Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Interrupt
mode bit (WDIE) are locked to 1 and 0 respectively. To further ensure program security, alter-
ations to the Watchdog set-up must follow timed sequences. The sequence for clearing WDE
and changing time-out configuration is as follows:
Ultra Low Power RC
OSCILLATOR
16
ms
32
ms
64
ms
0.13s
0.26s
0.51s
1.0s
2.0s
4.1s
8.2s
WDP0
WDP1
WDP2
WDP3
WATCHDOG
RESET
WDE
WDIF
WDIE
MCU RESET
INTERRUPT
鐩搁棞PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| ATSAM3N4AA-AU | MCU FLASH 48-QFP |
| ATSAM3SD8CA-CU | IC MCU 2X256KB CORTEX-M3 100-QFN |
| ATSAM3U1EB-CU | IC MCU 64KB CORTEX-M3 144-TFBGA |
| ATSAM3X8EA-CU | IC MCU 2X256KB CORTEX-M3 144-BGA |
| ATTINY12V-1SUR | IC AVR MCU 1K FLASH 4MHZ 8-SOIC |
鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁� |
鍙冩暩鎻忚堪 |
|---|---|
| ATMEGA8HVA-4CKUR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 8KB FLSH 512B EE 1KB SRAM - 4 MHZ RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| ATMEGA8HVA-4TU | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 8KB, 512B EE 4MHz 1KB SRAM 1.8-9V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| ATMEGA8HVA-4TUR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 8KB FLSH 512B EE 1KB SRAM - 4 MHZ RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| ATMEGA8HVD-4MX | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 8KB, 512B EE 4MHz 1KB SRAM 2.1-8V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| ATMEGA8L-8AC | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 8K FLASH 512B EE 1K SRAM ADC 3V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
鐧�(f膩)甯冪穵鎬ラ噰璩硷紝3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京銆�
