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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | ATMEGA649V-8MI |
| 寤犲晢锛� | Atmel |
| 鏂囦欢闋佹暩(sh霉)锛� | 101/146闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC AVR MCU FLASH 64K 1.8V 64QFN |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | megaAVR Introduction |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 260 |
| 绯诲垪锛� | AVR® ATmega |
| 鏍稿績铏曠悊鍣細 | AVR |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 8MHz |
| 閫ｉ€氭€э細 | SPI锛孶ART/USART锛孶SI |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰�(f霉)浣�锛孡CD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 53 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 | 64KB锛�32K x 16锛� |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶�?銆�?/td> | 2K x 8 |
| RAM 瀹归噺锛� | 4K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 5.5 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 8x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 64-VFQFN 瑁搁湶鐒婄洡 |
| 鍖呰锛� | 鎵樼洡 |
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2010-2012 Microchip Technology Inc.
DS41440C-page 341
PIC16(L)F1825/1829
LSLF
Logical Left Shift
Syntax:
[ label ] LSLF
f {,d}
Operands:
0
f 127
d
[0,1]
Operation:
(f<7>)
C
(f<6:0>)
dest<7:1>
0
dest<0>
Status Affected:
C, Z
Description:
The contents of register 鈥榝鈥� are shifted
one bit to the left through the Carry flag.
A 鈥�0鈥� is shifted into the LSb. If 鈥榙鈥� is 鈥�0鈥�,
the result is placed in W. If 鈥榙鈥� is 鈥�1鈥�, the
result is stored back in register 鈥榝鈥�.
LSRF
Logical Right Shift
Syntax:
[ label ] LSRF
f {,d}
Operands:
0
f 127
d
[0,1]
Operation:
0
dest<7>
(f<7:1>)
dest<6:0>,
(f<0>)
C,
Status Affected:
C, Z
Description:
The contents of register 鈥榝鈥� are shifted
one bit to the right through the Carry
flag. A 鈥�0鈥� is shifted into the MSb. If 鈥榙鈥� is
鈥�0鈥�, the result is placed in W. If 鈥榙鈥� is 鈥�1鈥�,
the result is stored back in register 鈥榝鈥�.
register f
0
C
register f
C
0
MOVF
Move f
Syntax:
[ label ]
MOVF f,d
Operands:
0
f 127
d
[0,1]
Operation:
(f)
(dest)
Status Affected:
Z
Description:
The contents of register f is moved to
a destination dependent upon the
status of d. If d = 0,
destination is W register. If d = 1, the
destination is file register f itself. d = 1
is useful to test a file register since
status flag Z is affected.
Words:
1
Cycles:
1
Example:
MOVF
FSR, 0
After Instruction
W = value in FSR register
Z= 1
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| ATMEGA8515L-8JUR | MCU AVR 8KB FLASH 8MHZ 44PLCC |
| ATMEGA8515L-8PJ | IC MCU AVR 8K 5V 8MHZ 40-DIP |
| ATMEGA8535-16JUR | MCU AVR 8K FLASH 16MHZ 44PLCC |
| ATMEGA8535L-8PJ | IC MCU AVR 8K 5V 8MHZ 40-DIP |
| ATMEGA88-15MT2 | MCU AVR 8K FLASH 15MHZ 32-QFN |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| ATmega649V-8MU | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 64K FLASH 2K EE 4K SRAM ADC LCD RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| ATMEGA649V-8MUR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 64KB FLSH 2KB EE 4KB SRAM LCD8MHz1.8V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| ATMEGA64A-AN | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 16MHz 105C RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| ATMEGA64A-ANR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 16MHz 105C RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| ATMEGA64A-AU | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 64K Flsh 2K EEPROM 4K SRAM 16MHz RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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