參數資料
型號: ATLANTA ATM
廠商: Lineage Power
英文描述: Switch Core Chip Set(ATM開關內核芯片組)
中文描述: 交換核心芯片組(自動柜員機開關內核芯片組)
文件頁數: 1/6頁
文件大?。?/td> 156K
代理商: ATLANTA ATM
Product Brief
March 1997
ATLANTA ATM Switch Core Chip Set
S
LUCENT TECHNOLOGIES—PROPRIETARY
Use pursuant to Company Instructions
Overview
Lucent Technologies’ ATLANTA ATM Switch Core
chip set provides a leading-edge, highly integrated,
innovative, and comprehensive VLSI solution for
implementing complete functionality of high-perfor-
mance ATM switching systems. The chip set is highly
flexible and modular, enabling the design of the ATM
switch to be optimized for a variety of different appli-
cations, including ATM multiplexor/concentrator,
workgroup switch, LAN backbone, enterprise, and
WAN edge/access switches. The chip set enables the
construction of nonblocking, feature-rich, and cost-
effective ATM switching systems, scalable over a
wide range of switching capacities, anywhere from
0.5 Gbits/s to 25 Gbits/s in throughput. With the chip
set, system designers can greatly simplify their sys-
tem development, dramatically reduce the develop-
ment expense and product cost, and significantly
accelerate time to market introduction.
The ATLANTA chip set is based on novel architecture
and algorithms developed (several patented or patent
pending) by Bell Labs. It consists of four components
and has native support for OC-12 ports. Only 17
chips are needed to implement the complete ATM
core of a 5 Gbits/s 8 x 8 @ 622 Mbits/s or 32 x 32 @
155 Mbits/s switch (additional components for com-
pleting the system are standard physical interface cir-
cuits, control CPU, and standard, readily-available,
low-cost SRAMs). The modularity of the architecture
allows the system to be scaled to higher capacities
with repeated instances of the same four compo-
nents, maintaining linear cost increment all the way to
25 Gbits/s switch size (for example, a 40 x 40 @
622 Mbits/s or 160 x 160 @ 155 Mbits/s system). The
chip set is designed to be highly flexible in facilitating
system differentiation through various configuration
options, including fault tolerance capabilities, and
accommodation of proprietary circuits aimed at
enhancements for traffic and network management.
Chip Set Description
The highly integrated ATLANTA ATM Switch Core
chip set consists of four chips, fabricated in low-
power CMOS technology, optimized for 3 V operation
with 5 V tolerant I/O:
I
LUC4AU01 ATM layer UNI manager (ALM) pro-
cesses up to 64K VCs at 622 Mbits/s full-duplex
ATM traffic throughput.
I
LUC4AB01 ATM buffer manager (ABM) queues up
to 32K cells at 622 Mbits/s full-duplex ATM traffic
throughput.
I
LUC4AS01 ATM switch element (ASX) switches
8 x 8 ports at 622 Mbits/s (5 Gbits/s total ATM
throughput) with on-chip 512-cell buffering.
I
LUC4AC01 ATM crossbar element (ACE) connects
up to 8 x 8 ports at 622 Mbits/s with variable size
crossbars.
Figures 1, 2, and 3 show various application dia-
grams.
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