參數(shù)資料
型號: ATF1504BE-5AX100
廠商: Atmel
文件頁數(shù): 4/30頁
文件大?。?/td> 0K
描述: IC CPLD 64MC 1.8V 100-TQFP
標準包裝: 90
系列: ATF15xx
可編程類型: 系統(tǒng)內(nèi)可編程(最少 10,000 次編程/擦除循環(huán))
最大延遲時間 tpd(1): 7.0ns
電壓電源 - 內(nèi)部: 1.7 V ~ 1.9 V
宏單元數(shù): 64
輸入/輸出數(shù): 80
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP
供應商設備封裝: 100-TQFP(14x14)
包裝: 托盤
配用: ATF15XX-DK3-ND - KIT DEV FOR ATF15XX CPLD'S
12
3637B–PLD–1/08
ATF1504BE
Figure 5-2.
Configuration of ATF1504BE Device Using a Processor and Memory
5.3
Direct Reconfiguration Access – DRA
This reconfiguration mode allows the user to directly modify the internal static registers of the
CPLD without affecting the configuration data stored in the embedded memory. It is more useful
in cases where immediate and temporary context change in the function of the hardware is
desired.
The embedded configuration memory in the ATF1504BE does not change when a new set of
configuration data is passed to the ATF1504BE using the DRA mode. Instead, the internal static
registers of the CPLD are directly written with the data entering the device via the JTAG port. In
other words, it's a temporary change in the function performed by the CPLD since a power
sequence results in the device being configured again by the data stored in the embedded
memory.
5.4
ISP Programming Protection
The ATF1504BE has a special feature that locks the device and prevents the inputs and I/O
from driving if the programming process is interrupted for any reason. The I/O pins default to
high-Z state during such a condition.
All ATF1504BE devices are initially shipped in the erased state, thereby making them ready to
use for ISP.
TCK
ATF1504BE
CPLD Device
Processor
Memory
Address
Data
Serial Data
TDI
TMS
TDO
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