參數(shù)資料
型號(hào): ATF-521P8-TR1
廠商: AGILENT TECHNOLOGIES INC
元件分類: 小信號(hào)晶體管
英文描述: C BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET, MO-229
封裝: 2 X 2 MM, 0.75 MM HEIGHT, LPCC-8
文件頁數(shù): 7/24頁
文件大?。?/td> 248K
代理商: ATF-521P8-TR1
15
The second solution is a low pass
configuration with a shunt
capacitor and a series inductor
shown in Figure 5 and 6.
L1
RFin
RFout
C1
Figure 5. Low Pass Circuit Topology.
Amp
Frequency
Figure 6. Low Pass Frequency Response.
The actual values of these
components may be calculated by
hand on a Smith Chart or more
accurately done on simulation
software such as ADS. There are
some advantages and disadvan-
tages of choosing a high pass
versus a low pass. For instance, a
high pass circuit cuts off low
frequency gain, which narrows
the usable bandwidth of the
amplifier, but consequently helps
avoid potential low frequency
instability problems. A low pass
match offers a much broader
frequency response, but it has
two major disadvantages. First it
has the potential for low fre-
quency instability, and second it
creates the need for an extra DC
blocking capacitor on the input
in order to isolate the device gate
from the preceding stages.
Figure 7 displays the input and
output matching selected for
ATF-521P8. In this example the
input and output match both
essentially function as high pass
filters, but the high frequency
gain of the device rolls off
precipitously giving a narrow
band frequency response, yet still
wide enough to accommodate a
CDMA or WCDMA transmit band.
For more information on RF
matching techniques refer to
MGA-53543 application note.
Passive Bias [1]
Once the RF matching has been
established, the next step is to
DC bias the device. A passive
biasing example is shown in
Figure 8. In this example the
voltage drop across resistor R3
sets the drain current (Id) and is
calculated by the following
equation:
R3 =
V
dd – V
ds
(1)
p
Ids + Ibb
where,
V
dd is the power supply voltage;
Vds is the device drain to source
voltage;
I
ds is the device drain to source
current;
Ibb for DC stability is 10X the
typical gate current;
A voltage divider network with
R1 and R2 establishes the typical
gate bias voltage (Vg).
R1 =
Vg
(2)
p
Ibb
R2 =
(V
dd – V
g) x R1
(3)
p
Vg
Often the series resistor, R4, is
added to enhance the low fre-
quency stability. The complete
passive bias example may be
found in reference [1].
INPUT
OUTPUT
Zo
C1
C4
Zo
C5
C6
Vdd
R3
L4
L1
R4
R5
C3
C2
R1
R2
Q1
Ib
Figure 8. Passive Biasing.
+
+=
Input Match
Amp
Frequency
Amp
ATF-521P8
Frequency
Amp
Output Match
Total Response
Amp
Frequency
Zo
52
C2
C1
C3
L1
RFout
RFin
Figure 7. Input and Output Match for ATF-521P8 at 2 GHz.
相關(guān)PDF資料
PDF描述
ATF-521P8-TR2 C BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET, MO-229
ATF-521P8-BLK C BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET, MO-229
ATF-521P8-TR2G C BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET, MO-229
ATF-521P8-TR1G C BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET, MO-229
ATF-521P8-BLKG C BAND, Si, N-CHANNEL, RF SMALL SIGNAL, HEMFET, MO-229
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