參數(shù)資料
型號(hào): AT91SAM7S32B-MU-999
廠商: Atmel
文件頁數(shù): 164/165頁
文件大?。?/td> 0K
描述: IC MCU ARM7 32KB FLASH 48-VQFN
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 3,500
系列: SAM7S
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 55MHz
連通性: I²C,SPI,SSC,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 21
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-VFQFN 裸露焊盤
包裝: 帶卷 (TR)
配用: AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
AT91SAM7S-EK-ND - KIT EVAL FOR ARM AT91SAM7S
98
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
It is made up of:
A bus arbiter
An address decoder
An abort status
A misalignment detector
An Embedded Flash Controller
The MC handles only little-endian mode accesses. The masters work in little-endian mode only.
18.3.1
Bus Arbiter
The Memory Controller has a simple, hard-wired priority bus arbiter that gives the control of the bus to one of the
two masters. The Peripheral DMA Controller has the highest priority; the ARM processor has the lowest one.
18.3.2
Address Decoder
The Memory Controller features an Address Decoder that first decodes the four highest bits of the 32-bit address
bus and defines three separate areas:
One 256-Mbyte address space for the internal memories
One 256-Mbyte address space reserved for the embedded peripherals
An undefined address space of 3584M bytes representing fourteen 256-Mbyte areas that return an Abort if
accessed
Figure 18-2 shows the assignment of the 256-Mbyte memory areas.
Figure 18-2. Memory Areas
18.3.2.1
Internal Memory Mapping
Within the Internal Memory address space, the Address Decoder of the Memory Controller decodes eight more
address bits to allocate 1-Mbyte address spaces for the embedded memories.
The allocated memories are accessed all along the 1-Mbyte address space and so are repeated n times within this
address space, n equaling 1M bytes divided by the size of the memory.
When the address of the access is undefined within the internal memory area, the Address Decoder returns an
Abort to the master.
0x0000 0000
0x0FFF FFFF
0x1000 0000
0xEFFF FFFF
0xF000 0000
0xFFFF FFFF
256M Bytes
14 x 256MBytes
3,584 Mbytes
Internal Memories
Undefined
(Abort)
Peripherals
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