參數(shù)資料
型號(hào): AT90USB647-MU
廠商: Atmel
文件頁數(shù): 65/106頁
文件大?。?/td> 0K
描述: IC AVR MCU 64K 64QFN
產(chǎn)品培訓(xùn)模塊: megaAVR Introduction
標(biāo)準(zhǔn)包裝: 1,300
系列: AVR®
應(yīng)用: USB 微控制器
核心處理器: AVR
程序存儲(chǔ)器類型: 閃存(64 kB)
控制器系列: AT90 USB
RAM 容量: 4K x 8
接口: 2 線串行,SPI 串行,USART,USB
輸入/輸出數(shù): 48
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 托盤
供應(yīng)商設(shè)備封裝: 64-VQFN(9x9)
配用: ATSTK600-TQFP64-ND - STK600 SOCKET/ADAPTER 64-TQFP
ATSTK525-ND - KIT STARTER FOR AT90USB
AT90USBKEY2-ND - KIT DEMO FOR AT90USB
其它名稱: AT90USB647-16MU
AT90USB647-16MU-ND
Q4939729A
61
7593L–AVR–09/12
AT90USB64/128
Figure 9-5.
Brown-out reset during operation.
9.6
Watchdog reset
When the Watchdog times out, it will generate a short reset pulse of one CK cycle duration. On
the falling edge of this pulse, the delay timer starts counting the time-out period t
TOUT. Refer to
page 63 for details on operation of the Watchdog Timer.
Figure 9-6.
Watchdog reset during operation.
9.6.1
MCUSR – MCU Status Register
The MCU Status Register provides information on which reset source caused an MCU reset.
Bit 4 – JTRF: JTAG Reset Flag
This bit is set if a reset is being caused by a logic one in the JTAG Reset Register selected by
the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset, or by writing a logic
zero to the flag.
Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
VCC
RESET
TIMEOUT
INTERNAL
RESET
VBOT-
VBOT+
tTOUT
CK
CC
Bit
765
43
210
JTRF
WDRF
BORF
EXTRF
PORF
MCUSR
Read/write
R
R/W
Initial value
0
See bit description
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