參數(shù)資料
型號: AT45CS1282
廠商: Atmel Corp.
英文描述: 128-megabit 2.7-volt Dual-interface Code Shadow DataFlash
中文描述: 128兆2.7伏的雙界面代碼陰影的DataFlash
文件頁數(shù): 10/33頁
文件大?。?/td> 252K
代理商: AT45CS1282
10
AT45CS1282 [Preliminary]
3447A–DFLSH–2/04
If a Group A mode is in progress (not fully completed), then another mode in Group A
should not be started. However, during this time in which a Group A mode is in
progress, modes in Group B can be started, except the first two Group A commands
(Memory Array Read Commands).
This gives the DataFlash the ability to virtually accommodate a continuous data stream.
While data is being programmed into main memory from buffer 1, data can be loaded
into buffer 2 (or vice versa). See application note AN-4 (“Using Atmel’s Serial
DataFlash”) for more details.
Pin Descriptions
SERIAL/8-BIT INTERFACE CONTROL (SER/BYTE):
The DataFlash may be config-
ured to utilize either its serial port or 8-bit port through the use of the serial/8-bit control
pin (SER/BYTE). When the SER/BYTE pin is held high, the serial port (SI and SO) of
the DataFlash will be used for all data transfers, and the 8-bit port (I/O7 - I/O0) will be in
a high impedance state. Any data presented on the 8-bit port while SER/BYTE is held
high will be ignored. When the SER/BYTE is held low, the 8-bit port will be used for all
data transfers, and the SO pin of the serial port will be in a high impedance state. While
SER/BYTE is low, any data presented on the SI pin will be ignored. Switching between
the serial port and 8-bit port should only be done while the CS pin is high and the device
is not busy in an internally self-timed operation.
The SER/BYTE pin is internally pulled high; therefore, if the 8-bit port is never to be
used, then connection of the SER/BYTE pin is not necessary. In addition, if the
SER/BYTE pin is not connected or if the SER/BYTE pin is always driven high externally,
then the 8-bit input/output pins (I/O7-I/O0), the VCCP pin, and the GNDP pin should be
treated as “don’t connects”.
SERIAL INPUT (SI):
The SI pin is an input-only pin and is used to shift data serially into
the device. The SI pin is used for all data input, including opcodes and address
sequences. If the SER/BYTE pin is always driven low, then the SI pin should be a “don’t
connect”.
SERIAL OUTPUT (SO):
The SO pin is an output-only pin and is used to shift data seri-
ally out from the device. If the SER/BYTE pin is always driven low, then the SO pin
should be a “don’t connect”.
8-BIT INPUT/OUTPUT (I/O7-I/O0):
The I/O7-I/O0 pins are bidirectional and used to
clock data into and out of the device. The I/O7-I/O0 pins are used for all data input,
including opcodes and address sequences. The use of these pins is optional, and the
pins should be treated as “don’t connects” if the SER/BYTE pin is not connected or if the
SER/BYTE pin is always driven high externally.
SERIAL CLOCK/CLOCK (SCK/CLK):
The SCK and CLK pins are input-only pins and
are used to control the flow of data to and from the DataFlash. The SCK and CLK pins
are used for serial and 8-bit interface respectively. Data is always clocked into the
device on the rising edge of SCK/CLK and clocked out of the device on the falling edge
of SCK/CLK.
CHIP SELECT (CS):
The DataFlash is selected when the CS pin is low. When the
device is not selected, data will not be accepted on the input pins (SI or I/O7-I/O0), and
the output pins (SO or I/O7-I/O0) will remain in a high impedance state. A high-to-low
transition on the CS pin is required to start an operation, and a low-to-high transition on
the CS pin is required to end an operation.
HARDWARE PAGE WRITE PROTECT:
If the WP pin is held low, the first 256 pages
(sectors 0 and 1) of the main memory cannot be reprogrammed. The only way to repro-
gram the first 256 pages is to first drive the protect pin high and then use the program
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