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參數(shù)資料
型號: AT32UC3L064-ZAUR
廠商: Atmel
文件頁數(shù): 90/174頁
文件大?。?/td> 0K
描述: IC MCU AVR32 64K FLASH 48VQFN
產(chǎn)品培訓(xùn)模塊: AVR® UC3 Introduction
標(biāo)準(zhǔn)包裝: 1
系列: AVR®32 UC3 L
核心處理器: AVR
芯體尺寸: 32-位
速度: 50MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 9x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-VFQFN 裸露焊盤
包裝: 剪切帶 (CT)
其它名稱: AT32UC3L064-ZAURCT
41
32099I–01/2012
AT32UC3L016/32/64
7.
Peripheral DMA Controller (PDCA)
Rev: 1.2.2.1
7.1
Features
Multiple channels
Generates transfers between memories and peripherals such as USART and SPI
Two address pointers/counters per channel allowing double buffering
Performance monitors to measure average and maximum transfer latency
Optional synchronizing of data transfers with extenal peripheral events
Ring buffer functionality
7.2
Overview
The Peripheral DMA Controller (PDCA) transfers data between on-chip peripheral modules such
as USART, SPI and memories (those memories may be on- and off-chip memories). Using the
PDCA avoids CPU intervention for data transfers, improving the performance of the microcon-
troller. The PDCA can transfer data from memory to a peripheral or from a peripheral to memory.
The PDCA consists of multiple DMA channels. Each channel has:
A Peripheral Select Register
A 32-bit memory pointer
A 16-bit transfer counter
A 32-bit memory pointer reload value
A 16-bit transfer counter reload value
The PDCA communicates with the peripheral modules over a set of handshake interfaces. The
peripheral signals the PDCA when it is ready to receive or transmit data. The PDCA acknowl-
edges the request when the transmission has started.
When a transmit buffer is empty or a receive buffer is full, an optional interrupt request can be
generated.
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