參數(shù)資料
型號(hào)： AT32UC3L064-ZAUR
廠商： Atmel
文件頁數(shù)： 76/174頁
文件大?。?/td> 0K
描述： IC MCU AVR32 64K FLASH 48VQFN
產(chǎn)品培訓(xùn)模塊： AVR® UC3 Introduction
標(biāo)準(zhǔn)包裝： 1
系列： AVR®32 UC3 L
核心處理器： AVR
芯體尺寸： 32-位
速度： 50MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，DMA，POR，PWM，WDT
輸入/輸出數(shù)： 36
程序存儲(chǔ)器容量： 64KB（64K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 16K x 8
電壓 - 電源 (Vcc/Vdd)： 1.62 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 9x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-VFQFN 裸露焊盤
包裝： 剪切帶 (CT)
其它名稱： AT32UC3L064-ZAURCT
29
32099I–01/2012
AT32UC3L016/32/64
4.5.3
Supervisor Calls
The AVR32 instruction set provides a supervisor mode call instruction. The scall instruction is
designed so that privileged routines can be called from any context. This facilitates sharing of
code between different execution modes. The scall mechanism is designed so that a minimal
execution cycle overhead is experienced when performing supervisor routine calls from time-
critical event handlers.
The scall instruction behaves differently depending on which mode it is called from. The behav-
iour is detailed in the instruction set reference. In order to allow the scall routine to return to the
correct context, a return from supervisor call instruction, rets, is implemented. In the AVR32UC
CPU, scall and rets uses the system stack to store the return address and the status register.
4.5.4
Debug Requests
The AVR32 architecture defines a dedicated Debug mode. When a debug request is received by
the core, Debug mode is entered. Entry into Debug mode can be masked by the DM bit in the
status register. Upon entry into Debug mode, hardware sets the SR.D bit and jumps to the
Debug Exception handler. By default, Debug mode executes in the exception context, but with
dedicated Return Address Register and Return Status Register. These dedicated registers
remove the need for storing this data to the system stack, thereby improving debuggability. The
Mode bits in the Status Register can freely be manipulated in Debug mode, to observe registers
in all contexts, while retaining full privileges.
Debug mode is exited by executing the retd instruction. This returns to the previous context.
4.5.5
Entry Points for Events
Several different event handler entry points exist. In AVR32UC, the reset address is
0x80000000. This places the reset address in the boot flash memory area.
TLB miss exceptions and scall have a dedicated space relative to EVBA where their event han-
dler can be placed. This speeds up execution by removing the need for a jump instruction placed
at the program address jumped to by the event hardware. All other exceptions have a dedicated
event routine entry point located relative to EVBA. The handler routine address identifies the
exception source directly.
AVR32UC uses the ITLB and DTLB protection exceptions to signal a MPU protection violation.
ITLB and DTLB miss exceptions are used to signal that an access address did not map to any of
the entries in the MPU. TLB multiple hit exception indicates that an access address did map to
multiple TLB entries, signalling an error.
All interrupt requests have entry points located at an offset relative to EVBA. This autovector off-
set is specified by an interrupt controller. The programmer must make sure that none of the
autovector offsets interfere with the placement of other code. The autovector offset has 14
address bits, giving an offset of maximum 16384 bytes.
Special considerations should be made when loading EVBA with a pointer. Due to security con-
siderations, the event handlers should be located in non-writeable flash memory, or optionally in
a privileged memory protection region if an MPU is present.
If several events occur on the same instruction, they are handled in a prioritized way. The priority
ordering is presented in Table 4-4 on page 31. If events occur on several instructions at different
locations in the pipeline, the events on the oldest instruction are always handled before any
events on any younger instruction, even if the younger instruction has events of higher priority
相關(guān)PDF資料
PDF描述
XR17V258IV IC UART PCI BUS OCTAL 144LQFP
VI-B7H-IX-F2 CONVERTER MOD DC/DC 52V 75W
ATMEGA324P-B15AZ IC MCU 8BIT 32KB FLASH 44TQFP
MS3110F14-19S CONN RCPT 19POS WALL MNT W/SCKT
VI-B7H-IX-F1 CONVERTER MOD DC/DC 52V 75W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AT32UC3L064-ZAUT 功能描述:32位微控制器 - MCU UC3L-64KB Flash RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:90 MHz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT
AT32UC3L0-XPLD 功能描述:開發(fā)板和工具包 - AVR UC3 L0 Xplained Eval Kit RoHS:否 制造商:Arduino 產(chǎn)品:Evaluation Boards 工具用于評(píng)估:ATMega32U4 核心:AVR 接口類型:I2C, UART, USB 工作電源電壓:6 V to 20 V
AT32UC3L-EK 功能描述:開發(fā)板和工具包 - AVR AVR32 Eval Kit for AT32UC3L Series RoHS:否 制造商:Arduino 產(chǎn)品:Evaluation Boards 工具用于評(píng)估:ATMega32U4 核心:AVR 接口類型:I2C, UART, USB 工作電源電壓:6 V to 20 V
AT33 制造商:Panasonic Industrial Company 功能描述:KIT
AT-33 功能描述:揚(yáng)聲器與變頻器 PZ 96dB 2500Hz 15Vpp RoHS:否 制造商:PUI Audio 產(chǎn)品:Speakers 類型:Electromagnetic 頻率:900 Hz to 12 kHz 聲壓級(jí):88 dBA 阻抗:8 Ohms 功率額定值:1.2 W 形狀:Round 端接類型:Solder Pad 直徑:15 mm 長度: 寬度: 深度:4.4 mm 磁體材料:Neodymium Iron Boran (NdFeB) 圓錐體材料:Mylar
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*