參數(shù)資料
型號(hào): AT32UC3A3256AU-ALUT
廠商: Atmel
文件頁(yè)數(shù): 88/94頁(yè)
文件大?。?/td> 0K
描述: IC MCU 256KB FLASH 144LQFP
產(chǎn)品培訓(xùn)模塊: AVR® UC3 Introduction
標(biāo)準(zhǔn)包裝: 300
系列: AVR®32 UC3 A3 Audio
核心處理器: AVR
芯體尺寸: 32-位
速度: 66MHz
連通性: EBI/EMI,I²C,IrDA,MMC,SPI,SSC,UART/USART,USB OTG
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,WDT
輸入/輸出數(shù): 110
程序存儲(chǔ)器容量: 256KB(256K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-LQFP
包裝: 托盤
89
32072SH–AVR32–10/2012
AT32UC3A3
Fix/Workaround
None.
10.3.14
MCI
The busy signal of the responses R1b is not taken in account for CMD12
STOP_TRANSFER
It is not possible to know the busy status of the card during the response (R1b) for the com-
mands CMD12.
Fix/Workaround
The card busy line should be polled through the GPIO Input Value register (IVR) for com-
mands CMD12.
10.3.15
SSC
Frame Synchro and Frame Synchro Data are delayed by one clock cycle
The frame synchro and the frame synchro data are delayed from 1 SSC_CLOCK when:
- Clock is CKDIV
- The START is selected on either a frame synchro edge or a level
- Frame synchro data is enabled
- Transmit clock is gated on output (through CKO field)
Fix/Workaround
Transmit or receive CLOCK must not be gated (by the mean of CKO field) when START
condition is performed on a generated frame synchro.
10.3.16
FLASHC
Corrupted read in flash may happen after fuses write or erase operations (FLASHC
LP, UP, WGPB, EGPB, SSB, PGPFB, EAGPF commands)
After a flash fuse write or erase operation (FLASHC LP, UP, WGPB, EGPB, SSB, PGPFB,
EAGPF commands), reading (data read or code fetch) in flash may fail. This may lead to an
exception or to other errors derived from this corrupted read access.
Fix/Workaround
Before the flash fuse write or erase operation, enable the flash high speed mode (FLASHC
HSEN command). The flash fuse write or erase operations (FLASHC LP, UP, WGPB,
EGPB, SSB, PGPFB, EAGPF commands) must be issued from RAM or through the EBI.
After these commands, read 3 times one flash page initialized to 00h. Disable the flash high
speed mode (FLASHC HSDIS command). It is then possible to safely read or code fetch the
flash.
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