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參數(shù)資料
| 型號(hào)： | AT25320 |
| 廠商： | Atmel Corp. |
| 英文描述： | 32K SPI Serial EEPROMs(32K SPI串行EEPROM) |
| 中文描述： | 32K的的SPI（32K的的SPI串行EEPROM的串行EEPROM） |
| 文件頁(yè)數(shù)： | 7/17頁(yè) |
| 文件大小： | 250K |
| 代理商： | AT25320 |
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AT25080/160/320/640
7
Functional Description
The AT25080/160/320/640 is designed to interface directly
with the synchronous serial peripheral interface (SPI) of the
6805 and 68HC11 series of microcontrollers.
The AT25080/160/320/640 utilizes an 8-bit instruction reg-
ister. The list of instructions and their operation codes are
contained in Table 1. All instructions, addresses, and data
are transferred with the MSB first and start with a high-to-
low CS transition.
WRITE ENABLE (WREN):
The device will power-up in the
write disable state when V
CC
is applied. All programming
instructions must therefore be preceded by a Write Enable
instruction.
WRITE DISABLE (WRDI):
To protect the device against
inadvertent writes, the Write Disable instruction disables all
programming modes. The WRDI instruction is independent
of the status of the WP pin.
READ STATUS REGISTER (RDSR):
The Read Status
Register instruction provides access to the status register.
The READY/BUSY and Write Enable status of the
device can be determined by the RDSR instruction. Simi-
larly, the Block Write Protection bits indicate the extent of
protection employed. These bits are set by using the
WRSR instruction.
WRITE STATUS REGISTER (WRSR):
The WRSR instruc-
tion allows the user to select one of four levels of protec-
tion. The AT25080/160/320/640 is divided into four array
segments. One quarter (1/4), one half (1/2), or all of the
memory segments can be protected. Any of the data within
any selected segment will therefore be READ only. The
block write protection levels and corresponding status
register control bits are shown in Table 4.
The three bits, BP0, BP1, and WPEN are nonvolatile cells
that have the same properties and functions as the regular
memory cells (e.g. WREN, t
WC
, RDSR).
Table 1.
Instruction Set for the AT25080/160/320/640
Instruction
Name
Instruction
Format
Operation
WREN
0000 X110
Set Write Enable Latch
WRDI
0000 X100
Reset Write Enable Latch
RDSR
0000 X101
Read Status Register
WRSR
0000 X001
Write Status Register
READ
0000 X011
Read Data from Memory Array
WRITE
0000 X010
Write Data to Memory Array
Table 2.
Status Register Format
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WPEN
X
X
X
BP1
BP0
WEN
RD
Y
Table 3.
Read Status Register Bit Definition
Bit
Definition
Bit 0 (RDY)
Bit 0 = 0 (RDY) indicates the device is READY. Bit
0 = 1 indicates the write cycle is in progress.
Bit 1 (WEN)
Bit 1= 0 indicates the device is not WRITE
ENABLED. Bit 1 = 1 indicates the device is
WRITE ENABLED.
Bit 2 (BP0)
See Table 3.
Bit 3 (BP1)
See Table 3.
Bits 4 - 6 are 0s when device is not in an internal write cycle.
Bit 7 (WPEN)
See Table 4.
Bits 0 - 7 are 1s during an internal write cycle.
Table 4.
Block Write Protect Bits
Level
Status
Register
Bits
Array Addresses Protected
BP1
BP0
AT25080
AT25160
AT25320
AT25640
0
0
0
None
None
None
None
1(1/4)
0
1
0300
-03FF
0600
-07FF
0C00
-0FFF
1800
-1FFF
2(1/2)
1
0
0200
-03FF
0400
-07FF
0800
-0FFF
1000
-1FFF
3(All)
1
1
0000
-03FF
0000
-07FF
0000
-0FFF
0000
-1FFF
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT25320-10PA-2.7C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|4KX8|CMOS|DIP|8PIN|PLASTIC |
| AT25320-10PA-5.0C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|4KX8|CMOS|DIP|8PIN|PLASTIC |
| AT25320-10PC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:SPI Serial EEPROMs |
| AT25320-10PC-1.8 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:SPI Serial EEPROMs |
| AT25320-10PC-2.7 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:SPI Serial EEPROMs |
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