參數(shù)資料
型號: AT24RF08C
廠商: Atmel Corp.
英文描述: Asset Identification EEPROM(雙存取EEPROM(帶一個有線串行端口和一個無線RFID端口))
中文描述: 資產(chǎn)識別的EEPROM(雙存取的EEPROM(帶一個有線串行端口和一個無線RFID的端口))
文件頁數(shù): 8/21頁
文件大?。?/td> 429K
代理商: AT24RF08C
AT24RF08C
8
Non EEPROM aspects of the RFID port operation,
including setting of the tamper bit, will take place normally
regardless of the actions on the serial port. Operation of the
RFID port does not depend on the state of any pin or the
state of any sticky bits, as power to the chip may not be
applied via the
VCC
pin when such operations are taking
place.
RFID Commands
The explicit commands implemented in this tag permit the
reader/writer to directly access individual areas within the
memory array and are encoded as follows. In all cases
below,
C
1
C
0
represents the two bit error detection field
(see
Error Detection
on page 11) for the command that is
used to prevent improper command execution.
For all commands, the first three bits transmitted (b
10
- b
8
)
form a three bit unique command initiation pattern (CIP)
that allows the transponder to be synchronized with the
reader / writer. The middle bit of this pattern (signified by
e
for error in the table below) is an entire bit time of no
modulation, which is a Manchester error. The entire
command initiation pattern consists of
bit time of
modulation followed by two bit times of no modulation
followed by
bit time of modulation.
The three global commands may be sent to
selected
chips
during the second bit of any three bit listening window or to
unselected
, chips in the
init
state or
quiet
chips at any
time. In general, they operate upon all tags within the field,
however, if a chip is currently transmitting data to the
reader or waiting for an ACK pulse, it will not be able to
recognize these commands.
For the Read and Write commands, the data
corresponding to the accessed word or page is repeatedly
transmitted back to the reader by the device, after the
command has completed. This permits a verify function for
the write operation and a repetition check for the read data.
After the last bit of a read command is sent, there is a delay
of 136 cycles before the first read data bit is transmitted by
the chip. After a write command, there is a delay of t
wd
before the written data is transmitted back to the reader.
There should be no modulation of the carrier by the reader
during these delays.
Between each 32 or 128 bits of data transmitted, there is a
3-bit listening window to synchronize the reader and/or to
permit the reader to issue a new command to the device.
See
Listening Window Structure
on page 9.
There is no delay interval between the transmission of the
write commands and the data that is to be written.
Immediately after the last bit of the command (C
0
), the
most significant bit of the data should be sent to the device
without any interruption.
There is no retransmission of the data after the Global
Write Word command, since multiple tags are expected to
be able to have executed this command at the same time.
To verify proper operation of this command, each tag must
be individually selected and the word read explicitly using
the Read Word command.
Command Encoding
b
10
b
9
b
8
0
e
1
0
e
1
0
e
1
b
7
B
2
P
2
1
b
6
B
1
P
1
1
b
5
B
0
P
0
1
b
4
0
0
1
b
3
0
1
0
b
2
0
0
0
b
1
C
1
C
1
C
1
b
0
C
0
C
0
C
0
Meaning
Set Block Address Latch (BL) to B
Set Page Address Latch (PL) to P
Set Block Address Latch (BL) to ID Block
0
0
0
0
e
e
e
e
1
1
1
1
P
2
P
2
W
1
W
1
P
1
P
1
W
0
W
0
P
0
P
0
0
0
1
0
1
0
0
0
1
1
1
1
1
1
C
1
C
1
C
1
C
1
C
0
C
0
C
0
C
0
Write Page P in Block BL (followed by 128 bits of data)
Read Page P in Block BL (followed by 128 bits of data)
Write Word W, Page PL, Block BL (32 bits of data)
Read Word W, Page PL, Block BL (32 bits of data)
0
0
0
0
0
e
e
e
e
e
1
1
1
1
1
0
1
1
1
1
0
1
0
0
1
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
C
1
C
1
C
1
C
1
C
1
C
0
C
0
C
0
C
0
C
0
Disable Chip Until Power Down (set QUIET bit)
Global Reset QUIET bit
Set EEPROM Tamper Latch (selected tag only)
Global Set EEPROM Tamper Latch
Global Write Word W, Page 1, Block 0 (32 bits of data)
W
1
W
0
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