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87C196CA/87C196CB
DATA SHEET REVISION HISTORY
This is the -003 revision of the 87C196CA/CB data
sheet. The following differences exist between the
-002 version and the -003 revision.
1. The data sheet has been revised to ADVANCE
from PRELIMINARY, indicaitng the specifica-
tions have been verified through electrical tests.
2. The 87C196CB 100-ld QFP package and device
pinout has been added to the data sheet.
3. The 87C196CB 100-ld QFP device supports up
the 16 Mbyte of linear address space.
4. The package thermal characteristics for the
PLCC packages was added to the data sheet,
for the CB
i
JA
e
35.0
§
C/W,
i
JC
e
11.0
§
C/W.
For the CA,
i
JA
10.0
§
C/W.
5. The AN87C196CB pin package diagram was
corrected to show EA
Y
as opposed to EA.
e
36.5
§
C/W and
i
JA
e
6. The
corrected. Setting this bit to 0 selects EPROM/
CODERAM in segment 0FFH only. Setting this
bit to 1 selects both segment 0FFH and segment
00H.
REMAP
bit
funciton
for
CCB2
was
7. t
RLAZ
has been changed to 5 ns from 20 ns.
8. t
WLWH
for the CA has been changed to t
OSC
b
20 from t
OSC
b
30.
9. t
CLGX
has been changed to 0 ns min, from t
OSC
b
46 max.
10. Timing specifications for the SSIO are now add-
ed. These timings are currently guaranteed by
design.
11. Added frequency designation to family nomen-
clature Figure 2.
This is the -002 revision of the 87C196CA data
sheet. The following difference exist between the
-001 version and the -002 revision.
1. This data sheet now includes the specifications
for the 87C196CB as well as the 87C196CA.
2. ABSOLUTE MAXIMUM RATINGS have been
added.
3. Maximum Frequency has been increased to
20 MHz.
4. Maximum ICC has been increased from 75 mA
to 100 mA for the CB, 90 mA for the CA.
5. Idle Mode current has been increased to 35 mA
from 30 mA for the CB, 40 mA for the CA.
6. Input leakage current for Port 0 (ILI1) was de-
creased to 1.5
m
A from 2.0
m
A for the CA.
7. The electrical characteristics for the CAN mod-
ule were removed. The electrical characteristics
for TXCAN and RXCAN are identical to standard
port pins.
8. t
OSC
(1/freq) was modified to reflect 20 Mhz tim-
ings.
9. t
OFD
(Oscillator Fail Detect Specification) for
clock failure to RESET pin pulled low, was added
to the data sheet (4
m
s min, 40
m
s max)
10. t
WHQX
has been increased to t
OSC
b
25 ns min
from t
OSC
b
30 ns min.
11. t
RXDX
has been replaced by t
RHDX
. t
RLAZ
has
been increased to 20 ns max from 5 ns max.
12. I
PP
programming supply current has been in-
creased to 200 mA from 100 mA.
13. t
CONV
Conversion time for 10 bit A/D conver-
sions has been decreased to reflect 20 Mhz op-
eration.
14. R
RST
was added for the 87C196CA (min
e
6
k
X
/max
e
65 k
X
.
15. t
CLLH
Dmin/max parameters switched to accu-
rately reflect this timing parameter.
16. t
RLCL
DSeparate timings for the 87C196CA vs
87C196CB. t
RLCL
for the CB is min
b
8 ns, max
a
20 ns. For the CA, t
RLCL
min
a
4 ns/max
a
30 ns.
17. t
RLRH
changed to T
OSC
b
10 ns from T
OSC
b
5 ns.
18. t
AVGV
added for the 87C196CB.
19. t
LLGV
added for the 87C196CB.
20. t
CLGX
added for the 87C196CB.
21. t
RLDV
DSeparate timings for 87C196CB. t
RLDV
max
e
T
OSC
b
30 ns. For the 87C196CA,
t
RLDV
max
T
OSC
b
22 ns.
22. HOLD/HOLDA
timings
87C196CB.
added
for
the
23. Slave Port Timings added for the 87C196CB.
24. Separate
87C196CB, t
PLPH
, min
e
100 T
OSC
. For the
87C196CA, t
PLPH
min
e
50 T
OSC
.
25. Separate
specificatons
87C196CB, t
PLDV
min
e
100 T
OSC
for the
87C196CA, t
PLDV
min
e
50 T
OSC
.
26. 8-Bit mode A/D characteristics added.
specifications
for
t
PLPH
for
the
for
t
PLDV
for
the
33