參數(shù)資料
型號(hào): AS7C33256FT18B-80TQI
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 3.3V 256K x 18 Flow Through Synchronous SRAM
中文描述: 256K X 18 STANDARD SRAM, 8 ns, PQFP100
封裝: 14 X 20 MM, TQFP-100
文件頁(yè)數(shù): 1/19頁(yè)
文件大小: 401K
代理商: AS7C33256FT18B-80TQI
December 2004
Copyright Alliance Semiconductor. All rights reserved.
AS7C33256FT18B
3.3V 256K
×
18 Flow Through Synchronous SRAM
12/10/04; v.1.4
Alliance Semiconductor
P. 1 of 19
Features
Organization: 262,144 words × 18 bits
Fast clock to data access: 6.5/7.5/8.0/10.0 ns
Fast OE access time: 3.5/4.0 ns
Fully synchronous flow through operation
Asynchronous output enable control
Availalbe in 100-pin TQFP package
Individual byte write and Global write
Multiple chip enables for easy expansion
3.3V core power supply
2.5V or 3.3V I/O operation with separate V
DDQ
Linear or interleaved burst control
Snooze mode for reduced power standby
Common data inputs and data outputs
Selection guide
–65
7.5
6.5
250
120
30
-75
8.5
7.5
225
100
30
-80
10
8.0
200
90
30
-10
12
10.0
175
90
30
Units
ns
ns
mA
mA
mA
Minimum cycle time
Maximum clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
Logic block diagram
Burst logic
CLK
ADSP
LBO
CLK
CS
CLR
18
16
18
A[17:0]
18
Address
D
CS
Q
CLK
256K × 18
Memory
array
18
18
DQb
CLK
D
registers
D
registers
Q
DQa
CLK
Q
Enable
CE
D
Q
delay
register
CLK
D
Q
Output
Buffers
Input
registers
Power
down
2
CE0
BW
b
BW
a
OE
ZZ
OE
CLK
BWE
GWE
18
DQ [a,b]
2
2
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