參數(shù)資料
型號: AS7C1026B
廠商: Alliance Semiconductor Corporation
英文描述: 5 V 64K X 16 CMOS SRAM
中文描述: 5伏64K的× 16 CMOS SRAM的
文件頁數(shù): 8/10頁
文件大小: 122K
代理商: AS7C1026B
AS7C1026B
3/26/04, v 1.3
Alliance Semiconductor
P. 8 of 10
Package dimensions
44-pin TSOP 2
Min
(mm)
Max
(mm)
1.2
0.15
1.05
0.45
A
A1
A2
b
c
D
E
He
e
l
0.05
0.95
0.30
0.120
18.31
0.21
18.52
10.26
11.94
10.06
11.68
0.80 (typical)
0.40
0.60
D
He
1 2 3 4 5 6 7 8 9 10 11 121314
44434241403938373635 343332 31
1516
3029
1718 1920
2827 2625
c
l
A1
A2
e
44-pin TSOP 2
0–5
°
21
24
22
23
E
A
b
Seating
plane
44-pin SOJ
44-pin SOJ
400 mil
Min (in) Max (in)
0.128
0.025
0.105
0.026
0.015
0.007
1.120
0.370 NOM
0.395
0.435
0.050 NOM
A
A
1
A
2
B
b
c
D
E
E
1
E
2
e
0.148
0.115
0.032
0.020
0.013
1.130
0.405
0.445
e
Pin 1
A
1
b
B
A
A
2
E
2
E
1
D
c
E
相關(guān)PDF資料
PDF描述
AS7C1026B-12TIN 5 V 64K X 16 CMOS SRAM
AS7C1026B-15JC High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125
AS7C1026B-15JCN High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125
AS7C1026B-15JI High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125
AS7C1026B-15TC High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AS7C1026B-10JC 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5 V 64K X 16 CMOS SRAM
AS7C1026B-10JCN 制造商:Alliance Memory Inc 功能描述:64K X 16 STANDARD SRAM, 10 NS
AS7C1026B-10JI 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5 V 64K X 16 CMOS SRAM
AS7C1026B-10JIN 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5 V 64K X 16 CMOS SRAM
AS7C1026B-10TC 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5 V 64K X 16 CMOS SRAM