參數(shù)資料
型號: AS2702
廠商: AUSTRIAMICROSYSTEMS AG
英文描述: AS-Interface Slave IC
中文描述: AS - Interface的奴隸集成電路
文件頁數(shù): 13/18頁
文件大?。?/td> 119K
代理商: AS2702
AS-Interface Slave IC
AS2702 (SAP4.1)
Rev. C, January 2001
Page 13 of 18
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AS2702 is equipped with a watchdog timer to supervise data communication by monitoring
the strobe signals at pins DSTBn and PSTBn.
If a parameter or data strobe is not followed by a consecutive strobe within a time period of
50 … 100 ms, the watchdog is triggered and initiates a ‘soft’ reset, see section ‘Reset’
5(6(7
There are 2 categories of reset-events, leading to 2 slightly different reset-conditions of the
slave device:
1) a ‘hard’ reset taking place at power-up and power-down of supply-voltages U5R and
UOUT.
At power-up the slave device leaves reset-condition as soon as U5R has passed 3.75V
and UOUT has passed VCOMOFF = nom. 10V.
At power-down the slave device is forced into reset-condition as soon as U5R drops below
3.75V.
(Tolerance of the threshold voltages referred to is -/+ 5%.)
2) a ‘soft’ reset, resulting from one of the following events:
2.1) Data strobe pin DSTBn is kept L for more than 100 ms;
2.2) Master command ‘RESET SLAVE’ is received;
2.3) Master command ‘RESET BROADCAST’ is received;
2.4) The communication watchdog is triggered.
A ‘hard’ reset event conditions the slave device as follows:
Internal states (counters, flags, …) are reset
The slave device’s receiver is desynchronized from the AS-interface bus
The low-side open-drain output stages at ports D3, …, D0 and ports P3, …, P0 are
switched off
Any test-mode will be cancelled.
A ‘soft’ reset has the following consequences:
A regular, nominal 6μs L-phase strobe is generated on both the DSTBn and PSTBn pin
The low-side open-drain output stages at ports D3, …, D0 and ports P3, …, P0 are
switched off
Internal states (counters, flags, …) are reset, however the following states and operations
are not affected:
the timer function which controls blinking of LED1 and LED2
the data communication watchdog
any testmode
any EEPROM write operation.
Remark:
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