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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | AS1752S-T |
| 寤犲晢锛� | ams |
| 鏂囦欢闋佹暩(sh霉)锛� | 7/17闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC SWITCH QUAD SPST 14-TSSOP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 2,500 |
| 鍔熻兘锛� | 闁嬮棞(gu膩n) |
| 闆昏矾锛� | 4 x SPST - NC |
| 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆锛� | 900 姣瓙 |
| 闆诲闆绘簮锛� | 鍠浕婧� |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 1.6 V ~ 3.6 V |
| 闆绘祦 - 闆绘簮锛� | 100nA |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 14-TSSOP锛�0.173"锛�4.40mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 14-TSSOP |
| 鍖呰锛� | 甯跺嵎 (TR) |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�鐣�(d膩ng)鍓嶇7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�
www.austriamicrosystems.com
Revision 1.41
14 - 16
AS1751/AS1752/AS1753
Data Sheet - Ap p lica tio n In fo r m a tio n
Figure 20. 14-pin TSSOP Package
Notes:
1. All dimensions are in millimeters; angles in degrees.
2. Dimensions and tolerancing per ASME Y14.5M-1994.
3. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15mm per side.
4. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm
per side.
5. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm total in excess of
dimension b at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum
space between protrusion and adjacent lead is 0.07mm for 0.5mm pitch packages.
6. Terminal numbers shown are for reference only.
7. Datums A and B to be determined at datum plane H.
8. Dimensions D and E1 to be determined at datum plane H.
9. This dimension applies only to variations with an even number of leads per side. For variations with an odd number
of leads per package, the center lead must be coincident with the package centerline, datum A.
10. Cross section A-A to be determined at 0.10 to 0.25mm from the leadtip.
Symbol
0.65mm Lead Pitch
1, 2
Note
Symbol
0.65mm Lead Pitch
1, 2
Note
Min
Nom
Max
Min
Nom
Max
A-
-
1.10
胃10
-
8
A1
0.05
-
0.15
L1
1.0 Ref
A2
0.85
0.90
0.95
aaa
0.10
L
0.50
0.60
0.75
bbb
0.10
R
0.09
-
ccc
0.05
R1
0.09
-
ddd
0.20
b
0.19
-
0.30
5
e
0.65 BSC
b1
0.19
0.22
0.25
胃2
12 Ref
c
0.09
-
0.20
胃3
12 Ref
c1
0.09
-
0.16
Variations
D
4.90
5.00
5.10
3, 8
e
0.65 BSC
E1
4.30
4.40
4.50
4, 8
N
14
6
E
6.4 BSC
ams
AG
Technical
content
still
valid
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| AS1751S-T | IC SWITCH QUAD SPST 14-TSSOP |
| VE-B41-IX | CONVERTER MOD DC/DC 12V 75W |
| VE-B41-IW | CONVERTER MOD DC/DC 12V 100W |
| VI-JTL-IW | CONVERTER MOD DC/DC 28V 100W |
| VI-JTJ-IW | CONVERTER MOD DC/DC 36V 100W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| AS1752V | 鍒堕€犲晢:AMSCO 鍒堕€犲晢鍏ㄧū:austriamicrosystems AG 鍔熻兘鎻忚堪:High-Speed, Low-Voltage, Single-Supply, 0.9, Quad SPST Analog Switches |
| AS1752V-T | 鍔熻兘鎻忚堪:IC SWITCH QUAD SPST 16TQFN RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 妯℃摤闁嬮棞(gu膩n)锛屽璺京(f霉)鐢ㄥ櫒锛屽璺垎瑙ｅ櫒 绯诲垪:- 鍏跺畠鏈夐棞(gu膩n)鏂囦欢:STG4159 View All Specifications 妯�(bi膩o)婧�(zh菙n)鍖呰:5,000 绯诲垪:- 鍔熻兘:闁嬮棞(gu膩n) 闆昏矾:1 x SPDT 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆:300 姣瓙 闆诲闆绘簮:闆欓浕婧� 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):±1.65 V ~ 4.8 V 闆绘祦 - 闆绘簮:50nA 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:7-WFBGA锛孎(xi脿n)CBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:7-瑕嗘櫠 鍖呰:甯跺嵎 (TR) |
| AS1753 | 鍒堕€犲晢:AMSCO 鍒堕€犲晢鍏ㄧū:austriamicrosystems AG 鍔熻兘鎻忚堪:High-Speed, Low-Voltage, Single-Supply, 0.9, Quad SPST Analog Switches |
| AS1753S | 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅�(sh铆)闁擄紙鏈€澶у€硷級: 闂�(gu膩n)闁夋檪(sh铆)闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16 |
| AS1753S-T | 鍔熻兘鎻忚堪:IC SWITCH QUAD SPST 14-TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 妯℃摤闁嬮棞(gu膩n)锛屽璺京(f霉)鐢ㄥ櫒锛屽璺垎瑙ｅ櫒 绯诲垪:- 鍏跺畠鏈夐棞(gu膩n)鏂囦欢:STG4159 View All Specifications 妯�(bi膩o)婧�(zh菙n)鍖呰:5,000 绯诲垪:- 鍔熻兘:闁嬮棞(gu膩n) 闆昏矾:1 x SPDT 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆:300 姣瓙 闆诲闆绘簮:闆欓浕婧� 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):±1.65 V ~ 4.8 V 闆绘祦 - 闆绘簮:50nA 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:7-WFBGA锛孎(xi脿n)CBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:7-瑕嗘櫠 鍖呰:甯跺嵎 (TR) |
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