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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | AS1752S-T |
| 寤犲晢锛� | ams |
| 鏂囦欢闋佹暩(sh霉)锛� | 2/17闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC SWITCH QUAD SPST 14-TSSOP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 2,500 |
| 鍔熻兘锛� | 闁嬮棞(gu膩n) |
| 闆昏矾锛� | 4 x SPST - NC |
| 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆锛� | 900 姣瓙 |
| 闆诲闆绘簮锛� | 鍠浕婧� |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 1.6 V ~ 3.6 V |
| 闆绘祦 - 闆绘簮锛� | 100nA |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 14-TSSOP锛�0.173"锛�4.40mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 14-TSSOP |
| 鍖呰锛� | 甯跺嵎 (TR) |
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www.austriamicrosystems.com
Revision 1.41
9 - 16
AS1751/AS1752/AS1753
Data Sheet - Ap p lica tio n In fo r m a tio n
9 Application Information
Power Supply Sequencing
Proper power-supply sequencing is critical for proper switch operation. The power supplies should be started up in the
following sequence:
1. V+
2. NOx, NCx, COMx
Note: Do not exceed the absolute maximum ratings (see page 2).
Overvoltage Protection
ON-resistance increases slightly at lower supply voltages.
Figure 12. Overvoltage Protection using 2 External Blocking Diodes
Adding diode D2 to the circuit shown in Figure 12 causes the logic threshold to be shifted relative to GND. Diodes D1
and D2 also protect against overvoltage conditions.
For example, in the circuit shown in Figure 12, if the supply voltage goes below the absolute maximum rating, and if a
fault voltage up to the absolute maximum rating is applied to an analog signal pin, no damage will result.
Power Supply Bypass
Power supply connections to the devices must maintain a low impedance to ground. This can be done using a bypass
capacitor, which will also improve noise margin and prevent switching noise propagation from the V+ supply to other
components.
A 0.1F bypass capacitor, connected from V+ to GND (see Figure 18 on page 11), is adequate for most applications.
Logic Inputs
Driving INx Rail-to-Rail will help minimize power consumption.
Layout Considerations
High-speed switches require proper layout and design procedures for optimum performance.
!
Short, wide traces should be used to reduce stray inductance and capacitance.
!
Bypass capacitors should be as close to the device as possible.
!
Large ground planes should be used wherever possible.
AS1751/AS1752/AS1753
GND
VGEN
COMx
D2
D1
V+
NOx
AG
Technical
content
still
valid
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| AS1751S-T | IC SWITCH QUAD SPST 14-TSSOP |
| VE-B41-IX | CONVERTER MOD DC/DC 12V 75W |
| VE-B41-IW | CONVERTER MOD DC/DC 12V 100W |
| VI-JTL-IW | CONVERTER MOD DC/DC 28V 100W |
| VI-JTJ-IW | CONVERTER MOD DC/DC 36V 100W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| AS1752V | 鍒堕€犲晢:AMSCO 鍒堕€犲晢鍏ㄧū:austriamicrosystems AG 鍔熻兘鎻忚堪:High-Speed, Low-Voltage, Single-Supply, 0.9, Quad SPST Analog Switches |
| AS1752V-T | 鍔熻兘鎻忚堪:IC SWITCH QUAD SPST 16TQFN RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 妯℃摤闁嬮棞(gu膩n)锛屽璺京(f霉)鐢ㄥ櫒锛屽璺垎瑙ｅ櫒 绯诲垪:- 鍏跺畠鏈夐棞(gu膩n)鏂囦欢:STG4159 View All Specifications 妯�(bi膩o)婧�(zh菙n)鍖呰:5,000 绯诲垪:- 鍔熻兘:闁嬮棞(gu膩n) 闆昏矾:1 x SPDT 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆:300 姣瓙 闆诲闆绘簮:闆欓浕婧� 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):±1.65 V ~ 4.8 V 闆绘祦 - 闆绘簮:50nA 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:7-WFBGA锛孎(xi脿n)CBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:7-瑕嗘櫠 鍖呰:甯跺嵎 (TR) |
| AS1753 | 鍒堕€犲晢:AMSCO 鍒堕€犲晢鍏ㄧū:austriamicrosystems AG 鍔熻兘鎻忚堪:High-Speed, Low-Voltage, Single-Supply, 0.9, Quad SPST Analog Switches |
| AS1753S | 鍔熻兘鎻忚堪:妯℃摤闁嬮棞(gu膩n) IC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闁嬮棞(gu膩n)鏁�(sh霉)閲�:2 闁嬮棞(gu膩n)閰嶇疆:SPDT 闁嬪暉闆婚樆锛堟渶澶у€硷級:0.1 Ohms 鍒囨彌闆诲锛堟渶澶э級: 闁嬪暉鏅傞枔锛堟渶澶у€硷級: 闂�(gu膩n)闁夋檪闁擄紙鏈€澶у€硷級: 宸ヤ綔闆绘簮闆诲:2.7 V to 4.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-16 |
| AS1753S-T | 鍔熻兘鎻忚堪:IC SWITCH QUAD SPST 14-TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - 妯℃摤闁嬮棞(gu膩n)锛屽璺京(f霉)鐢ㄥ櫒锛屽璺垎瑙ｅ櫒 绯诲垪:- 鍏跺畠鏈夐棞(gu膩n)鏂囦欢:STG4159 View All Specifications 妯�(bi膩o)婧�(zh菙n)鍖呰:5,000 绯诲垪:- 鍔熻兘:闁嬮棞(gu膩n) 闆昏矾:1 x SPDT 灏�(d菐o)閫氱媭鎱�(t脿i)闆婚樆:300 姣瓙 闆诲闆绘簮:闆欓浕婧� 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):±1.65 V ~ 4.8 V 闆绘祦 - 闆绘簮:50nA 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:7-WFBGA锛孎(xi脿n)CBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:7-瑕嗘櫠 鍖呰:甯跺嵎 (TR) |
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