ProASICPLUS Flash Family FPGAs v5.9 2-57 Asynchronous SRAM Write Note: The pl" />
參數(shù)資料
型號: APA600-FGG676I
廠商: Microsemi SoC
文件頁數(shù): 143/178頁
文件大?。?/td> 0K
描述: IC FPGA PROASIC+ 600K 676-FBGA
標準包裝: 40
系列: ProASICPLUS
RAM 位總計: 129024
輸入/輸出數(shù): 454
門數(shù): 600000
電源電壓: 2.3 V ~ 2.7 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 676-BGA
供應(yīng)商設(shè)備封裝: 676-FBGA(27x27)
ProASICPLUS Flash Family FPGAs
v5.9
2-57
Asynchronous SRAM Write
Note: The plot shows the normal operation status.
Figure 2-30 Asynchronous SRAM Write
Table 2-54 TJ = 0°C to 110°C; VDD = 2.3 V to 2.7 V for Commercial/Industrial
TJ = –55°C to 150°C, VDD = 2.3 V to 2.7 V for Military/MIL-STD-883B
Symbol txxx
Description
Min.
Max.
Units
Notes
AWRH
WADDR hold from WB
1.0
ns
AWRS
WADDR setup to WB
0.5
ns
DWRH
DI hold from WB
1.5
ns
DWRS
DI setup to WB
0.5
ns
PARGEN is inactive.
DWRS
DI setup to WB
2.5
ns
PARGEN is active.
WPDA
WPE access from DI
3.0
ns
WPE is invalid, while PARGEN is
active.
WPDH
WPE hold from DI
1.0
ns
WRCYC
Cycle time
7.5
ns
WRMH
WB high phase
3.0
ns
Inactive
WRML
WB low phase
3.0
ns
Active
WRB, WBLKB
WADDR
WPE
DI
tAWRS
tWPDA
tAWRH
tDWRS
tWRML
tWRMH
tWRCYC
tWPDH
tDWRH
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