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215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
CALIFORNIA MICRO DEVICES
AP-211
The CMPWR100 gives priority to the primary input V
over
the secondary input V
. It also provides an internal reference
voltage at 4.1V used to set the threshold. When the primary
V
drops below this threshold, V
becomes the selected
input source. To prevent chatter, the threshold logic has a
built-in hysteresis of 150mV, and the primary source is only
selected again when the V
CC
level exceeds 4.25V typically.
All control circuitry needed to provide a smooth and automatic
transition between supplies has been incorporated, allowing
the V
to be dynamically switched without loss of output
voltage. A STATUS output pin is used to indicate an acceptable
V
level. Internal circuitry guarantees that high isolation is
maintained between both supplies under all operating
conditions.
Typical Applications
In a PCI modem application, regulator is used to provide
backward compatibility for 3.3V modems with older systems
where only 5V is provided on the PCI bus. The CMPWR100 is
used to generate the 3.3V on board from a 5V source. The
two Vaux input pins must be connected together to the
3.3Vaux provided on new systems.
In order to maintain regulator stability and minimize
disturbance on power supplies during change over between
input sources, an external 4.7
μ
F capacitor is required between
the output and ground. The external capacitor provides the
necessary filtering to minimize transients during supply change
over and ensures regulator stability. Most Tantalum type
capacitors are recommended. But the capacitor should have
a low ESR (Equivalent Series Resistance). The value of the
capacitor may be increased to minimize switch over transients.
A bypass capacitor in the range of 1
μ
F to 10
μ
F may be
connected between VCC and ground in order to filter out
voltage transients. This is recommended for longer PCB trace
connections between the input and the power supply, inducing
large series resistance.
Figure 6.
Dual Input Power Management Circuit
2
3
7
CM PWR-100
5V main
3.3V Vaux
3.3V output
1
4
Vaux
Vaux
Vout1
Vcc
Gnd
Status
Vout2
nc
6
8
5
To
PCI
bus
4.7
μ
F
+
0.1
μ
F
4.7
μ
F
+
0.1
μ
F
0.1
μ
F
As stated earlier, the STATUS pin may be used to indicate the
state of the regulator. It is active High when the regulator
is turned on (V
> V
), and may be used to drive the gate
of an external P-channel MOSFET switch in parallel with the
integrated PMOS switch for Vaux. This will provide an even
lower ON resistance between Vaux and Vout, thus lowering
power dissipation further. To be efficient, the external switch
should have an on-resistance of less than 400m
at V
GS
= 3V
and I
D
=0.2A.
CMPWR150 POWER REGULATOR
APPLICATION
Device Operation
The
CMPWR150
employs a circuit topology similar to the
CMPWR100
, but utilizes an external P-channel MOSFET to
switch Vaux at current levels up to 375mA. The
CMPWR150
is designed to regulate up to 500mA of continuous output
current when operating from V
CC
. The external switch handles
all the V
requirements. The
CMPWR150
exceeds the PCI-
defined maximum 375mA load capability.
All control circuitry needed to provide a smooth and automatic
transition between supplies has been incorporated. This offers
trouble-free transitions between input voltages, or between
sleep and wake-up modes. Internal circuitry guarantees that
high isolation is maintained between the V
CC
supply and the
output under all operating conditions. The V
to V
isolation
is achieved by disabling the external PFET when the regulator
is enabled. The V
to V
isolation is achieved by forcing the
regulator pass transistor to be disabled.
The V
input is compared to a 4.1V internal threshold level.
Whenever V
drops below that level, the regulator is disabled
and the DRIVE output is enabled (active low). The DRIVE
output is used to control an external P-channel MOSFET switch
for connecting an auxiliary 3.3V voltage source to the load.
When the regulator is enabled, the DRIVE output is set to V
CC
.
1. The P-channel MOSFET must have a low on resistance at
low voltage:
1.
The P-channel MOSFET must have a low on resistance
VAat low voltage:
DS(ON)
X I
Dmax
) > Vout
min
TypiV
at
V
GS
= 3V
and I
= 375mA.
A tTypically, R
for and I
= 375mA.
A typical 75mV voltage drop across the switch is applicable
2. Tfor most cases.
of 1V.
equof 1V.
We recommend the Vishay Siliconix Si2301DS, Fairchild
FDN338P, or equivalent.
We recommend Siliconix Si2301DS, Fairchild FDN338P, or
AUX
(R
X I
Dmax
) > V
OUTmin
must be less than 200m
at
V
GS
= 3V
The MOSFET must typically have a gate threshold voltage