
9/99
2
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
CALIFORNIA MICRO DEVICES
AP-211
Figure 1.
CM PWR-100 Block Diagram
Power Requirements on V
In order to limit the power consumed by the system in the
sleep mode, each PCI card must reduce its current
consumption from the auxiliary power supply. The power
operating conditions are displayed below.
That means that each PCI add-in cards load on 3.3V
must
not exceed 375mA. When the board is in a sleep state with
wake up event generation disabled, it must reduce its total slot
current to less than 20mA which can be done several ways:
internally disabling as much logic as possible on the
board, or
electrically isolating the 3.3
V
AUX
pin from the auxiliary
power plane of the board.
power plane of the board.
Dual Power Supply
A dual mode power supply is able to deliver the same reference
voltage from two separate tuned (load-wise) power sources.
For example, a main power source will provide a high capacity,
high efficiency 3.3V source for heavy runtime loads, and a
lower capacity auxiliary source, yet reasonably efficient, 3.3V
source for lightly loaded sleeping states. A voltage switch
is required in order to select between one of these two different
sources. This can be implemented with discrete Schottky
diodes, or more efficiently, with California Micro Devices
power switch, the
CMPWR025.
California Micro Devices has developed a family of SmartOR
TM
Power Management devices to address all these requirements
whose characteristics are summarized in Table 2 and will be
the primary focus of this application note.
Table 1.
Power Requirements for V
AUX
Table 2.
Summary of Power Management Devices
Figure 2.
CM PWR-150 Block Diagram
In the next sections, we will discuss specific applications for
the CMPWR100 and CMPWR150. In order to facilitate the
design process, California Micro Devices has available a
SmartOR
TM
evaluation board for use in the lab and to facilitate
PCB layout.
r
e
t
e
m
V
a
r
a
3
3
P
n
u
o
y
t
w
p
s
d
c
e
d
e
a
n
e
p
e
e
e
a
s
e
D
e
w
r
w
o
p
e
e
e
N
0
I
M
.
P
3
Y
T
.
X
6
A
M
.
T
N
s
V
U
X
U
A
l
d
b
o
P
p
d
e
a
n
e
_
x
a
m
I
p
u
e
k
a
5
7
3
A
m
d
e
a
s
_
x
a
m
I
p
e
k
a
w
0
2
A
m
d
GND
VOUT
VCC1
VCC2
All these parts are general purpose smart voltage regulators
and/or switches. They can be used in PCI modem, PCI LAN
card, or dual power system applications.
Figures 1-3 below illustrate a simplified block diagram of
each of the power management devices.
.
VOUT
DRIVE
VCC
GND
.
.
V
N
I
V
[
o
t
V
T
U
O
V
[
3
r
V
A
3
r
V
A
V
C
r
V
C
I
m
[
<
T
U
A
2
O
e
g
a
k
c
a
P
e
c
e
P
M
D
C
n
o
n
r
o
o
r
u
F
]
5
]
]
0
0
1
R
W
d
V
n
a
m
t
g
c
w
V
o
r
g
e
R
e
R
S
t
5
0
0
C
O
S
n
h
X
U
A
T
U
O
X
U
0
5
1
R
W
P
M
C
5
o
t
5
<
0
0
5
3
6
2
O
O
S
T
n
n
C
X
U
5
2
0
R
W
P
M
C
h
c
w
S
t
p
n
u
D
5
o
t
8
1
C
<
0
0
5
C
O
S
S
M
n
n
P
O
2
C
electrically isolating the 3.3
V
AUX
pin from the auxiliary
Figure 3.
CMPWR025 Block Diagram