參數(shù)資料
型號(hào): AOP604
廠商: Optek Technology
英文描述: LJT 12C 8#20 4#16 SKT WALL REC
中文描述: 增強(qiáng)模式互補(bǔ)場(chǎng)效應(yīng)晶體管
文件頁(yè)數(shù): 4/11頁(yè)
文件大?。?/td> 842K
代理商: AOP604
AOP60
4
Symbol
STATIC PARAMETERS
Drain-Source Breakdown Voltage
Min
Typ
Max
Units
BV
DSS
-30
V
-1
-5
T
J
=55°C
I
GSS
V
GS(th)
I
D(ON)
±100
-2.4
nA
V
A
-1.2
30
-2
28
37
44
13
35
45
58
T
J
=125°C
m
g
FS
V
SD
I
S
DYNAMIC PARAMETERS
Input Capacitance
S
V
A
-0.76
-1
-4.2
C
iss
C
oss
C
rss
R
g
SWITCHING PARAMETERS
Total Gate Charge (10V)
920
190
122
3.6
pF
pF
pF
Q
g
(10V)
Q
g
(4.5V)
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
18.5
9.6
2.7
4.5
7.7
5.7
20.2
9.5
20
8.8
nC
nC
nC
nC
ns
ns
ns
ns
ns
nC
p-channel MOSFET Electrical Characteristics (T
J
=25°C unless otherwise noted)
Parameter
Conditions
I
D
=-250
μ
A, V
GS
=0V
V
DS
=-24V, V
GS
=0V
I
DSS
Zero Gate Voltage Drain Current
μ
A
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
V
DS
=0V, V
GS
=±20V
V
DS
=V
GS
I
D
=-250
μ
A
V
GS
=-10V, V
DS
=-5V
V
GS
=-10V, I
D
=-6.6A
m
V
GS
=-4.5V, I
D
=-5A
V
DS
=-5V, I
D
=-6.6A
I
S
=-1A,V
GS
=0V
R
DS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Maximum Body-Diode Continuous Current
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
V
GS
=0V, V
DS
=-15V, f=1MHz
V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge (4.5V)
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
V
GS
=-10V, V
DS
=-15V, I
D
=-6.6A
V
GS
=-10V, V
DS
=-15V, R
L
=2.3
,
R
GEN
=3
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=-6.6A, dI/dt=100A/
μ
s
I
F
=-6.6A, dI/dt=100A/
μ
s
SOA curve provides a single pulse rating.
A: The value of R
θ
JA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The
value in any a given application depends on the user's specific board design. The current rating is based on the t
10s thermal resistance
rating.
B: Repetitive rating, pulse width limited by junction temperature.
C. The R
θ
JA
is the sum of the thermal impedence from junction to lead R
θ
JL
and lead to ambient.
D. The static characteristics in Figures 1 to 6,12,14 are obtained using 80
μ
s pulses, duty cycle 0.5% max.
E. These tests are performed with the device mounted on 1 in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The
Alpha & Omega Semiconductor, Ltd.
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