參數(shù)資料
型號(hào): AO4701
廠商: ALPHA
英文描述: P-Channel Enhancement Mode Field Effect Transistor with Schottky Diode
中文描述: P通道增強(qiáng)模式場(chǎng)的肖特基二極管晶體管
文件頁(yè)數(shù): 2/8頁(yè)
文件大?。?/td> 307K
代理商: AO4701
AO4701
Symbol
STATIC PARAMETERS
Drain-Source Breakdown Voltage
Min
Typ
Max
Units
BV
DSS
-30
V
-1
-5
T
J
=55°C
I
GSS
V
GS(th)
I
D(ON)
±100
-1.3
nA
V
A
-0.7
-25
-1
42.5
49
74
64
120
T
J
=125°C
54
83
11
m
m
g
FS
V
SD
I
S
DYNAMIC PARAMETERS
7
S
V
A
-0.75
-1
-3
C
iss
C
oss
C
rss
R
g
SWITCHING PARAMETERS
Total Gate Charge
Gate Source Charge
Gate Drain Charge
952
103
77
5.9
pF
pF
pF
Q
g
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
SCHOTTKY PARAMETERS
V
F
Forward Voltage Drop
9.5
2
3.1
12
4
37
12
21
13
nC
nC
nC
ns
ns
ns
ns
ns
nC
0.45
0.007
0.5
0.05
V
3.2
12
37
10
20
C
T
pF
Gate resistance
V
GS
=0V, V
DS
=0V, f=1MHz
Turn-Off Fall Time
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
I
F
=-5A, dI/dt=100A/
μ
s
V
GS
=0V, V
DS
=-15V, f=1MHz
V
GS
=-4.5V, V
DS
=-15V, I
D
=-4A
V
GS
=-10V, V
DS
=-15V, R
L
=3.6
,
R
GEN
=6
m
V
GS
=-4.5V, I
D
=-4A
V
GS
=-2.5V, I
D
=-1A
I
S
=-1A,V
GS
=0V
V
DS
=-5V, I
D
=-5A
R
DS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
I
DSS
μ
A
Gate Threshold Voltage
On state drain current
V
DS
=V
GS
I
D
=-250
μ
A
V
GS
=-4.5V, V
DS
=-5V
V
GS
=-10V, I
D
=-5A
V
DS
=-24V, V
GS
=0V
V
DS
=0V, V
GS
=±12V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Electrical Characteristics (T
J
=25°C unless otherwise noted)
Parameter
Conditions
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=-5A, dI/dt=100A/
μ
s
I
D
=-250
μ
A, V
GS
=0V
I
F
=1.0A
V
R
=30V
V
R
=30V, T
J
=125°C
V
R
=30V, T
J
=150°C
V
R
=15V
I
rm
Maximum reverse leakage current
mA
Junction Capacitance
A: The value of R
θ
JA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The
value in any a given application depends on the user's specific board design. The current rating is based on the t
10s thermal resistance
rating.
B: Repetitive rating, pulse width limited by junction temperature.
C. The R
θ
JA
is the sum of the thermal impedence from junction to lead R
θ
JL
and lead to ambient.
D. The static characteristics in Figures 1 to 6,12,14 are obtained using 80
μ
s pulses, duty cycle 0.5% max.
E. These tests are performed with the device mounted on 1 in
SOA
id
i
l
l
ti
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The
Alpha & Omega Semiconductor, Ltd.
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