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參數(shù)資料
| 型號： | AND8054 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Designing RC Oscillator Circuits with Low Voltage Operational Amplifiers and Comparators for Precision Sensor Applications |
| 中文描述： | RC振蕩器電路設計低電壓運算放大器和精密傳感器應用比較 |
| 文件頁數(shù)： | 15/28頁 |
| 文件大?。?/td> | 168K |
| 代理商： | AND8054 |
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AND8054/D
http://onsemi.com
15
COMPONENT SELECTION
Operation Amplifiers
The selection of an appropriate operational amplifier in a
precision oscillator application is based on analyzing the
errors caused by the amplifiers. Operational amplifier errors
include input offset voltage (V
IO
) and input bias current (I
B
),
open loop gain (A
o
), and a finite bandwidth and slew rate
(SR). The error contribution of the operational amplifier can
be minimized if a low bias current, wide bandwidth
amplifier is chosen. Also, selecting a low oscillation
frequency minimizes the DC gain and bandwidth errors. In
sensor applications, only the frequency of the signal is
monitored; therefore, the DC amplifier errors of V
OS
, I
B
,
and a finite gain will result in output signal distortion, but
will not have a significant effect on the oscillation
frequency. The open loop gain of almost all amplifiers will
be several orders of magnitude larger than the closed loop
gain of an oscillator, which typically is 1 to 2 at each
amplifier. The AC amplifier errors resulting from a finite
slew rate and bandwidth has a minimal effect if the
oscillation frequency is relatively low (i.e. 10 kHz to
20 kHz).
Integrators
+
–
V
IN
V
OUT
R
C
Figure 13. Ideal Integrator Amplifier
Listed below are the equations for the ideal integrator
circuit formed by a single resistor and a capacitor as shown
in Figure 13.
VOUT(t)
1
RC
1
sRC
VIN(t)dt
VOUT(s)
VIN(s)
–
The ideal integrator equations do not consider the effect
of the amplifiers voltage offset and current bias offset errors.
The effect of the offset errors is shown below [3][11].
VOUT(t)
–RC
VIN(t)dt
1
RC
VIOdt
1
C
IBdt
VIO
= ideal
offset error
bias error
Where V
IO
and I
B
are defined as:
VIO
VIO
VIO
T
T(Temp)
VIO
Vs
IB
T
Vs(PowerSupply)
VIO
t
t(Time)
IB
IB
T(Temp)
IB
VS
Vs(PowerSupply)
IB
t
t(Time)
If the integrator offset and bias errors are referenced to the
output, as shown below,
dVOUT(t)
dt
the following observations can be made:
1. Use small R, large C.
2. V
OS
∝
1 / RC and I
B
∝
1 / C .
3. Use a low leakage current capacitor.
4. I
B
can be reduced if a resistor equal to the parallel
combination of R and C is connected to the
non–inverting input of the amplifier.
VIO
RC
IB
C
The error due to the operational amplifier’s finite open
loop gain and bandwidth, as shown below:
VOUT(s)
VIN(s)
1
sRC
1
1
1
Tos
Ao
1
1
sRpC
= ideal
(gain
bandwidth error)
where:
Rp
RdR
Rd
R
R
d
≡
open loop impedance
T
o
≡
–3 dB frequency
ω
1
≡
the unity gain bandwidth
≈
A
o
/ T
o
If A
o
>> 1, the transfer equation can be simplified to:
VOUT(s)
VIN(s)
–
1
sRC
1
1
1
Ao
Tos
Ao
1
AoRpCs
To
AoRpC
–
1
sRC
1
1
s
1
1
AoRpCs
Also, there will be an error due to the amplifier slew rate
and output current limitation. The slew rate error is defined
as:
dVOUT(t)
dt
where: f
P
≡
full power response
E
o
≡
rated output voltage
|max
2 fpEo
SR
The output current (I
o
) of the amplifier charges the
integrator feedback capacitor; thus, the integrator may have
a slew rate that is less than the specified amplifier SR. The
maximum rate of change of output voltage is equal to I
o
/C.
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