
AN723
Vishay Siliconix
FaxBack 408-970-5600, request 70823
www.siliconix.com
7
Other Issues
Sometimes higher input capacitance values are required
when ultra-high-speed, large-scale load transients occur at a
2.7-V or lower input voltages. If the voltage level at V
DD
drops
below 2.3 V, the UVLO circuit will instantaneously shut off the
IC and collapse the output. Best results can be achieved
when a higher-value R-C filter is used on V
DD
pin in
conjunction with higher input capacitance.
The PSM feature is designed to increase efficiency under light
load conditions and extend battery life. It does not offer an
efficiency advantage over PWM mode when the load exceeds
100 mA and a 1.5-
μ
H inductor is used. (Efficiency data are
given in the “Experimental Results” section.) However, with a
maximum of 1.5-
μ
H inductance, the Si9165 PSM mode
guarantees output regulation up to a 150-mA load for both
buck and boost converters under any input/output condition.
EXPERIMENTAL RESULTS
The Si9165 controller has been fully tested in both buck and
boost modes on demo boards. Some test results are
summarized here. For the waveforms shown, the channel
lineup from top to bottom is:
Channel 2 - V
OUT
voltage ripple
Channel 4 - inductor current, 200 mA/div.
Channel 1 - coil pin voltage, 2 V/div.
PWM Operation
Buck mode V
IN
= 3.6 V, V
OUT
= 2.7 V, load = 300 mA
FIGURE 10.
Buck PWM Waveforms
Boost mode V
IN
= 3.3 V, V
OUT
= 3.7 V, load = 300 mA
FIGURE 11.
Boost PWM Waveform
PSM Operation
Buck mode V
IN
= 3.6 V, V
OUT
= 2.7 V, load = 50 mA
FIGURE 12.
Buck PSM Waveform
Boost mode V
IN
= 3.3 V, V
OUT
= 3.7 V, load = 50 mA
FIGURE 13.
Boost PSM Waveform