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參數(shù)資料
| 型號： | AN723 |
| 廠商： | Vishay Intertechnology,Inc. |
| 英文描述： | Design A High Performance Buck or Boost Converter With Si9165 |
| 中文描述： | 設(shè)計高性能降壓或升壓轉(zhuǎn)換器Si9165 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 288K |
| 代理商： | AN723 |
AN723
Vishay Siliconix
2
FaxBack 408-970-5600, request 70823
www.siliconix.com
Start-Up/UVLO
The internal under voltage lock out (UVLO) circuit keeps most
of the IC function blocks off until the supply voltage (V
DD
)
increases above 2.4 V. A 100-mV hysteresis is built into the
UVLO point, so the controller will be functional until V
DD
drops
below 2.3 V. This helps to eliminate the IC from bouncing
between ON and OFF stages. After the IC is turned ON, it
takes about 4 ms for the POR to be ready, the error amp
output to charge up, and the output voltage to start ramping
up. The output voltage will need an additional 3 to 4 ms to
reach regulation, depending on load condition.
By-Pass Mode
When using the Si9165, the output voltage regulation point
can be set within the input voltage range, regardless of
whether a buck or boost configuration is being used. For
instance, for an input range of 2.7 V to 4.2 V, the output
voltage could be set to 3.3 V.
For a boost converter, when the input is higher than 3.3 V, the
duty cycle of the switch stays at 0%, and the output voltage
follows the input voltage by a voltage drop consisting of
inductor resistance and MOSFET (in PWM mode) or diode (in
PSM mode) drop. When the input decreases and approaches
3.3 V, the output drops to the regulation point, and the main
switch starts to switch at a minimum duty cycle to keep the
output regulated at 3.3 V. This duty cycle increases as the
input voltage decreases. In some instances, noise can be
generated during the transition because there is a minimum
controllable duty cycle for any PWM controller. The frequency
and amplitude of this transition noise vary depending on the
compensation network. The wider the loop bandwidth (BW),
the higher the switching frequency and the lower the output
ripple.
For a buck converter, when input voltage is higher than 3.3 V,
it is stepped down to 3.3 V at the output. As the input
decreases and approaches 3.3 V, the switching duty cycle
increases to the maximum duty cycle, jumping to 100% and
making the high-side switch work like a saturated linear
regulator. The output voltage will simply follow the input
voltage by the saturation voltage until the input drops below
the UVLO voltage or until another user-defined control signal
disables the converter. The same noise considerations as for
a boost converter apply in this case.
Buck/Boost Configuration
The Si9165 can be easily configured to function as a step-
down (buck) or a step-up (boost) converter. Figures 2 and 3
show the typical application circuit for buck and boost
converters, respectively. The list in Table 1 shows the key IC
connection differences in the two topologies.
TABLE 1.
Buck-Boost Pin Connection Comparison
FIGURE 2.
Typical Application Circuit-Buck
Name of Pin
Buck
Boost
V
IN
/V
OUT
MODE
Input
Output
Low
High
V
S
Input
Output
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