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參數(shù)資料
| 型號(hào)： | AN723 |
| 廠商： | Vishay Intertechnology,Inc. |
| 英文描述： | Design A High Performance Buck or Boost Converter With Si9165 |
| 中文描述： | 設(shè)計(jì)高性能降壓或升壓轉(zhuǎn)換器Si9165 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大小： | 288K |
| 代理商： | AN723 |
AN723
Vishay Siliconix
FaxBack 408-970-5600, request 70823
www.siliconix.com
5
FIGURE 6.
Buck Converter Loop Gain with Type I
Compensation
FIGURE 7.
Buck Converter Loop Gain with Type III
Compensation
FIGURE 8.
Buck Load
Transient w/Type I Compensation
V
IN
= 3.61 V, V
OUT
= 2.676 V, 300 mA Load Transient
FIGURE 9.
Buck Load Transient w/Type III Compensation
V
IN
= 3.6 V, V
OUT
= 2.64 V, 300 mA Load Transient
For voltage mode control, a simple Type I or II compensation
network can easily stabilize the loop but at a cost of lower BW,
which has to be at least one decade below the L-C corner
frequency to preserve a good stability margin. However, Type
III compensation, a more complicated design, enables higher
BW even above the L-C double-pole. A buck converter is used
as an example here to illustrate the difference between Type I
(Figure 6) and Type III (Figure 7) compensation. With the
switching frequency set to 2 MHz, a 1.5-
μ
H to 10-
μ
F L-C pair
is used for the power stage, producing a double pole at
40 kHz. The loop gain Bode plots are measured for both types
under the same conditions: V
IN
= 3.6 V, V
OUT
= 2.7 V, load =
300 mA. (See Figures 8 and 9). The BW is considerably
higher with Type III compensation. The resulting transient
waveforms for the two loops (Figures 10 and 11) show a
notable improvement in both over/undershoot magnitude and
recovery time with Type III compensation.
The values shown in Figure 7 work well for the Si9165 buck
converter with a 3.6-V input, so long as the switching
frequency is above 500 kHz, which is the range Si9165 is
optimized for. Since the converter power stage gain varies
with input voltage, the compensation circuit needs to be
adjusted accordingly to maintain a stability margin. The
circuitry in Figure 7 offers fast response with a sufficient
stability margin for input voltages below 3.6 V. If the input
voltage is above 3.6 V, the power stage gain, also part of the
loop gain, elevates to a level that will endanger both the phase
margin and gain margin of the control loop. Fortunately for
buck converters, a simple change on the input lead capacitor
C
3
can help compensate for this. The value can be adjusted
by the simple equation shown below:
C
3
IN
----------------------------------
=
(5)
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