- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375320 > AN6591FJM (PANASONIC CORP) Transmission / reception, single chip PLL IC for PHS, cordless telephone PDF資料下載
參數(shù)資料
| 型號(hào)： | AN6591FJM |
| 廠商： | PANASONIC CORP |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | Transmission / reception, single chip PLL IC for PHS, cordless telephone |
| 中文描述： | TELECOM, CORDLESS, RF AND BASEBAND CIRCUIT, PQCC44 |
| 封裝： | 6 X 6 MM, PLASTIC, QFN-44 |
| 文件頁數(shù)： | 15/21頁 |
| 文件大?。?/td> | 391K |
| 代理商： | AN6591FJM |
AN6591FJM
15
SDM00007BEB
■
Technical Data (continued)
2. 2nd synthesizer frequency dividing ratio
Set frequency (frequency dividing ratio) f
out2
=
233.15 MHz, f
r
=
50 kHz, (P
=
16, N
=
291, A
=
7, R
=
384 fixed)
Reference frequency f
REFIN
=
19.2 MHz
N10
MSB
LSB
N9 N8 N7 N6 N5 N4 N3 N2 N1 N0
X
X
X
A3 A2 A1 A0 PD
P
X
0
0
1
0
0
1
0
0
0
1
1
0
0
0
0
1
1
1
1
0
0
X
X
X
X
X R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0
X
X
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
LD output
High
Low
Lock or power save mode
Lock or power save mode
1st synthesizer
2nd synthesizer
Unlock
Lock or power save mode
Low
Low
Lock or power save mode
Unlock
Unlock
Unlock
X: don't care
3. Unlock detection and LD output specifications
1) The AND of the LD signal (2) of the 1st synthesizer block and the LD signal (3) of the 2nd synthesizer block is
output.
2) 1st synthesizer block
When the synthesizer block is locked, the LD output level will be high. When the synthesizer block is unlocked,
the LD output level will be low. The detection time is 3.3
μ
s. As for the precision of detection, unlock output turns
on if the devided frequency output of the circuit is (52
×
4) ns slower or faster than it should be at the frequency
f
ref
of 300 kHz. The lock signal is output in power save mode.
3) 2nd synthesizer block
When the synthesizer block is locked, the LD output level will be high. When the synthesizer block is unlocked,
the LD output level will be low. The detection time is 20
μ
s. As for the precision of detection, unlock output turns
on if the devided frequency output of the circuit is (52
×
4) ns slower or faster than it should be at the frequency
f
ref
of 50 kHz. The lock signal is output in power save mode.
4. Other specifications
1) Clock, Data, and STROBE all are high-active logics.
2) When the IC is turned on, set the IC to power save mode by setting both PS1 and PS2 to low-level. After serial
data is input, set the IC to operating mode by setting both PS1 and PS2 to high-level.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AN6593 | Single Low Power Consumption Operational Amplifiers |
| AN4250 | LJT 26C 26#20 PIN RECP |
| AN4250S | Circular Connector; No. of Contacts:26; Series:MS27656; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle RoHS Compliant: No |
| AN6612 | Motor Control Circuits |
| AN6612S | Motor Control Circuits |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AN6592 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Feedback Operational Amplifier |
| AN6592S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Feedback Operational Amplifier |
| AN6593 | 制造商:PANASONIC 制造商全稱:Panasonic Semiconductor 功能描述:Single Low Power Consumption Operational Amplifiers |
| AN65X150 | 制造商:FACOM 功能描述:SCREWDRIVER SLOT. 6 5X150 |
| AN6607NS | 制造商:Panasonic Industrial Company 功能描述:IC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。