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參數(shù)資料
| 型號： | AN5491K |
| 廠商： | PANASONIC CORP |
| 元件分類： | 偏轉(zhuǎn) |
| 英文描述： | Synchronous signal and deflection distortion correction processing IC supporting I2C bus for HD, wide television |
| 中文描述： | HORIZ/VERT DEFLECTION IC, PDIP42 |
| 封裝： | 0.600 INCH, PLASTIC, SDIP-42 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大?。?/td> | 153K |
| 代理商： | AN5491K |
ICs for TV
AN5491K
7
I
Electrical Characteristics at T
a
=
25
°
C (continued)
Design reference data (continued)
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
DC characteristics (continued)
BLK output amplitude
V
BLK
4
5
6
V
Vertical output drive current
I
28
V
V
V
CC
2
mA
Vertical output amplitude fluctuation
with supply voltage
Difference of V
CCmax
V
CCmin
0.1
V
Vertical output DC fluctuation
with supply voltage
V
28
V
CC
Difference of V
CCmax
V
CCmin
1.0
V
EW output amplitude fluctuation
with supply voltage
V
EW
V
CC
Difference of V
CCmax
V
CCmin
0.1
V
EW output DC fluctuation
with supply voltage
V
32
V
CC
Difference of V
CCmax
V
CCmin
1.0
V
Synchronizing signal processing
Horizontal free-running oscillation
frequency [Divide-by-15]
f
HO15
Pin 2: Without input, Pin 19: Low
Pins 25, 26, 31, 35: High
32.9
33.5
34.1
kHz
Horizontal output pull-in range
[Divide-by-8]
f
HP8
Pin 2: Without input, Pin 25: High
±
2 000
±
2 600
Pins 19, 26, 31, 35: Low
Hz
Comparator detection operation voltage
V
6
Pin 6: Minimum voltage to become
high, Pin 5: 6.2 V
5.7
6.3
6.9
V
Lock detection output voltage
V
37
I
LOCK
V
37
in horizontal AFC lock mode
DC measurement in divide-by-32
5.7
6.3
6.9
V
Lock detection charge and discharge
current
±
0.8
mA
FBP (AFC2) slice level
V
TFBP
Minimum voltage of pin 41 at
which AFC operates.
1.5
1.9
2.3
V
Horizontal AFC
μ
Horizontal VCO
β
μ
β
DC measurement in divide-by-32
37
μ
A/
μ
s
Slant of
β
curve near f
=
15.7 kHz
1.9
Hz/mV
FBP allowable range 1
[Divide-by-8]
t
FBP8
Time from H-out rise to FBP
center
3
9
μ
s
FBP allowable range 2
[Divide-by-16]
t
FBP16
Time from H-out rise to FBP
center
4
13
μ
s
FBP allowable range 3
[Divide-by-32]
t
FBP32
Time from H-out rise to FBP
center
6
20
μ
s
AFC1 reference current 1
I
AFC1
Data 0C
=
"11" (D1, D0)
Data 0C
=
"01" (D1, D0)
Data 0C
=
"10" (D1, D0)
Data 0C
=
"00" (D1, D0)
0.82
mA
AFC1 reference current 2
I
AFC2
1.1
mA
AFC1 reference current 3
I
AFC3
1.5
mA
AFC1 reference current 4
I
AFC4
f
HP16
2.0
mA
Horizontal output pull-in range 1
[Divide-by-16]
Pin 2: Without input
Pins 19, 25, 26, 31, 35: Low
±
1 000
±
1 300
Hz
Horizontal output pull-in range 2
[Divide-by-32]
f
HP32
Pin 2: Without input
Pin 19: High
±
500
±
650
Hz
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