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參數(shù)資料
| 型號： | AN2526NFH |
| 廠商： | PANASONIC CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Automotive LCD TV signal processor IC |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 33/35頁 |
| 文件大?。?/td> | 442K |
| 代理商： | AN2526NFH |
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AN2526NFH
33
SDB00080AEB
D7
D6 to D4
D3
D2
D1
D0
Selection
channel
EVR control function
Number
of bit
0
0
0
0
0
Vertical sync. signal output position
3
0
0
0
1
1
Horizontal sync. signal output position
5
0
0
1
0
2
PWM duty
6
0
0
1
1
3
Common pulse amplitude
7
0
1
0
0
4
Y-gain
8
0
1
0
1
5
Color gain
7
0
1
1
0
6
Hue
7
Mode Don't Care
0
1
1
1
7
Black-limiter level
8
1
0
0
0
8
Bright
8
1
0
0
1
9
Y-aperture gain
8
1
0
1
0
10
R-ch. sub bright
8
1
0
1
1
11
B-ch. sub bright
8
1
1
0
0
12
White peak limiter
8
1
1
0
1
13
Gamma-1 Knee level
8
1
1
1
0
14
Gamma-2 Knee level
8
1
1
1
1
15
RGB contrast
7
I
Technical Data (continued)
2. I
2
C control mode (continued)
6) Pulse timing (continued)
In case that the ch. has 8 bits or less of data bit number, the data in the data block is used to set various modes.
The content of each mode setting is same as three-wire control mode
Parameter
Symbol
Range
Min
Typ
Max
Unit
Composite video input signal
Y
IN
Sync. chip - white
0.9
1.0
1.1
V[p-p]
Y-input signal voltage
Y
IN
Pedestal - white
0.6
0.7
0.8
V[p-p]
C-input signal voltage
C
IN
Burst signal amplitude
200
300
400
mV[p-p]
MOS input signal low-level voltage
V
MOSL
0
0.8
V
MOS input signal high-level voltage
V
MOSH
2.3
*1
V
Synchronous signal input
H
SYNC
Pedestal - sync. chip
0.2
0.3
0.4
V[p-p]
Serial data transfer frequency
f
SD
1.0
MHz
Analog RGB input signal
RGB
IN
Pedestal - white
0.6
0.7
0.8
V[p-p]
3. Recommended Operating Conditions
Note)*: Set it lower than V
CC1
(Pin 1 voltage).
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