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參數(shù)資料
| 型號： | AN2526NFH |
| 廠商： | PANASONIC CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Automotive LCD TV signal processor IC |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 29/35頁 |
| 文件大?。?/td> | 442K |
| 代理商： | AN2526NFH |
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AN2526NFH
29
SDB00080AEB
D11
D10
D9
D8
D7
D6
YUV
D5
RGB
D4
D3
D2
D1
D0
V Mode
0
Video signal input display mode
1
Analog RGB input display mode
1
0
0
0
0
Chroma signal input mode
1
Color-difference signal input mode
0
PAL
1
NTSC
The delay time of pin 30 output to video signal is likely to vary according to an external constant connected to pin 45.
For an external constant, you are required to evaluate adequately the characteristics in weak electric field. Though the
horizontal sync signal output adjustment range is designed by referring to the center of pin 30 output pulse, there
would be some error according to VCO free-run frequency.
I
Technical Data (continued)
1. Three-wire control mode (continued)
4) Mode setup channel bit-map. (continued)
Horizontal PLL start position adjustment range
ch.1: Horizontal sync. output position adjustment
Pin 35 input
Composite sync.
signal odd number
field
Odd number field
EXCHF
=
"1"
EXCHF
=
"0"
Composite sync.
signal even number
field
6H to 9H (D3 to D4)
Horizontal PLL on
Horizontal PLL off
0-line
1
2
3
5.5H to 8.5H (D3 to D4)
Horizontal PLL on
Horizontal PLL off
6.5H to 9.5H (D3 to D4)
Horizontal PLL on
Horizontal PLL off
The above timing chart indicates (D4,D3)
=
"01".
PLL stop line number:254-line (NTSC)
302-line (PAL)
Composite sync.
signal input
(video signal)
Pin 30
Composite sync. signal output
Pin 32
Horizontal sync. signal output
(D4,D3,D2,D1,D0)
=
(00000)
Sync. sepa. delay time (Approximately 1
μ
s)
Pin 32
Horizontal sync. signal output
(D4,D3,D2,D1,D0)
=
(11111)
Pin 32
Horizontal sync. signal output
ch.0 (D6)
=
"1"
f
h
: Horizontal sync. frequency
h
32f
y
32f
y
31f
y
18f
y
Delay time
(Approximately 400 ns)
1f
y
=
31
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