參數(shù)資料
型號(hào)： AN2526NFH
廠商： PANASONIC CORP
元件分類(lèi)： 消費(fèi)家電
英文描述： Automotive LCD TV signal processor IC
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： 10 X 10 MM, PLASTIC, QFP-64
文件頁(yè)數(shù)： 28/35頁(yè)
文件大?。?/td> 442K
代理商： AN2526NFH
AN2526NFH
SDB00080AEB
28
I
Technical Data (continued)
1. Three-wire control mode (continued)
4) Mode setup channel bit-map.
ch.0: Vertical sync. output position adjustment
D11
D10
D9
D8
D7
D6
D5
D4 to D3
D2
D1
D0
EXCHF FIXHD BOSC
Hor. PLL start position adjustment
0
Automatic switching
1
263H/313H fixed (NTSC/PAL)
0
0
0
0
0
HD/VD output timing is serially variable
1
HD/VD output timing fixed
0
Odd number field: Advanced phase
1
Even number field: Advanced phase
Vertical sync. output timing adjusting range
Pin 35 input
Composite sync.
signal odd number
field
Pin 31 output
odd number field
FIXHD
=
"0"
Pin 31 output
odd number field
FIXHD
=
"1"
8H
2H to 9H(D0 to D2)
3Η
Composite sync.
signal even number
field
Pin 31 output
EXCHF
=
"1"
FIXHD
=
"0"
Pin 31 output
EXCHF
=
"1"
FIXHD
=
"1"
Pin 31 output
EXCHF
=
"0"
FIXHD
=
"1"
Pin 31 output
EXCHF
=
"0"
FIXHD
=
"1"
8H
8H
3Η
3Η
The above timing chart indicates (D2,D1,D0)
=
"101".
For (D2,D1,D0)
=
"000", the pin 31 output width is 9H.
The pin 31 timing is synchronous with the pin 35 input timing.
The above timing chart is just for your reference.
2.5H to 9.5H (D0 to D2)
1.5H to 8.5H(D0 to D2)
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