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參數(shù)資料
| 型號： | AN246 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Transmission lines and terminations with Philips Advanced Logic families |
| 中文描述： | 傳輸線，并與飛利浦先進邏輯家庭終端 |
| 文件頁數(shù)： | 3/13頁 |
| 文件大小： | 216K |
| 代理商： | AN246 |
Philips Semiconductors
Application Note
AN246
Transmission lines and terminations
with Philips Logic families
1998 Feb 05
3
Typical characteristic impedances on PC boards can be from 50
to 100
. The impedance can be determined by
Eq. 2
Z
O
L
O
C
O
where L
0
and C
0
are the characteristic inductance and capacitance
per unit length of the trace.
The line propagation delay can be determined by
Eq. 3
T
O
L
O
C
O
Distributed capacitive loads lower the effective impedance of a
transmission line and increase the line propagation delay. Consider
a bus structure with equally spaced loads of the same value as in
Figure 2. The capacitors represent the input capacitance of each
receiver.
L = 10 in.
ABT244
Z
O
= 65
L
O
= 9.2 nH/in.
C
O
= 2.2 pF/in.
T
= 142 ps/in.
C’s = 5 pF
SH00115
Figure 2. Equally spaced capacitive loads
If the driver’s rise or fall time is longer than the electrical length of
the spacing between the loads, the effects of individual capacitors
distribute evenly across the waveform edge. This adds capacitance
to the line’s characteristic capacitance. The board interconnect at
the receiver pin has capacitance also: via, connector, etc., and the
values are added to the receiver’s capacitance to form a lumped
value. Suppose the interconnect capacitance is 5 pF, then the
lumped distributed capacitance is 10 pF per every 2 inches or 5 pF
per inch. The new line impedance, Z
O
’, can be calculated and will
be
Eq. 4
Z
O
Z
O
1
CLU
CO
65
1
5 pF in.
2.2 pF in.
36
where C
LU
= load capacitance per unit length, pF/in.
Likewise, the new line propagation delay will be
Eq. 5
T
O
T
O
1
C
LU
C
O
142 ps in.
1
5 pF
2.2 pF
in.
in.
257 ps in.
Since the effective line impedance can be reduced with more
loading, a driver with sufficient source and sink capability should be
chosen to drive that particular impedance. This is discussed in the
next section.
INCIDENT WAVE SWITCHING AND DRIVER I-V
CHARACTERISTICS
When launching a pulse down the line, the driver needs sufficient
current to change the voltage on the line. For TTL level input
receivers, the guaranteed V
IH
and V
IL
levels are 2.0 V and 0.8 V.
This means that the leading edge ncident wave launched down the
line should meet those levels to switch all receivers on the line and
switch them only once. The drive current required is
Eq. 6
I
AV
at V
OH
V
IH
min
V
OL
typ
Z
O
Eq. 7
I
AV
at V
OL
V
OH
typ
V
IL
max
Z
O
As an example of incident wave switching capability, refer back to
the bus structure in Figure 2. The effective line impedance is 34
.
Using Equations 6 and 7, the drive current required to switch the line
is determined as follows:
I
AV
at V
OH
V
IH
min
V
OL
typ
Z
O
2 V
0.2 V
36
50 mA
and
I
AV
at V
OL
V
OH
typ
V
IL
max
Z
O
3.4 V
0.8 V
36
72 mA
ABT products are rated for +32 mA source current at 2 V and –64
mA sink current at 0.55 V. By referring to I-V curves you can
determine if the dynamic drive current is enough to switch the line
on the incident wave. From the following curves in Figures 3 and 4,
note that the –76 mA at 2 V and +167 mA at 0.8 V satisfies the
requirements in the above formulas. To compare the drive strength
of other product families, Figures 5 through 9 show IOL and IOH
currents for a typical ‘244 driver for the ABT16, ALVC, ALVT, LVC,
LVT, and LVT16 families.
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