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| 型號： | AN2353 |
| 英文描述： | The Essentials of Enhanced Time Processing Unit |
| 中文描述： | 增強型時間處理單元的要點 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 93K |
| 代理商： | AN2353 |
The Essentials of Enhanced Time Processing Unit, Rev. 1
The Microengine
Freescale Semiconductor
6
The comparative programmer’s models for the TPU and eTPU are shown in the figure.
Performance of the microengine has been enhanced by stretching the registers and arithmetic unit to 24
bits and extending the maximum clock speed of the eTPU. In addition, the 10 clock Time Slot Transition
of the TPU has been reduced to 6 clocks. The new instruction set includes some much needed bit
manipulation instructions. The eTPU also boasts a Multiply and Divide unit that can even execute a MAC
instruction. Despite the great increase in complexity, a survey suggests that automotive functions that
require multiple word parameters can be programmed more efficiently on the eTPU than the TPU.
Figure 3. Comparative Programming Models: TPU (Left) and eTPU
The number of events that can request service for a given channel has been increased, and the entry vector
table for each function has been doubled from 16 to 32. In addition, an alternate entry table can be selected,
E1
1 1 1
rsv
J/
C
BCC
FL
S
R
W
B
C
F
BAF[13:0]
00
P/
D
STC
E2
01
AID[2:0]
E3
FL
10
rsv
SMPR
E4
0
11
1
rsv
F1
rsv
1
rsv
111
rsv
format
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1
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format
microinstruction
31
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16 15 14 13 12 11
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0
Figure 2. eTPU Instruction Set Coding
p_msb
p_high
p_mid
p_low
p_h16
p_l16
0
31
p
a
b
c
d
diob
sr
mach
macl
tcr1
tcr2
ert1
ert2
0
23
rar
link
chan
tpr
trr
0
23
p_high
p_low
0
15
General Registers
p
a
diob
sr
Special Registers
tcr1
tcr2
ert
0
15
link
dec
chan
chan
dec
TPU
Programmer’s
Model
(TPU/TPU2/TPU3)
eTPU
Programmer’s
Model
General Registers
Special Registers
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