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| 型號： | AN2353 |
| 英文描述： | The Essentials of Enhanced Time Processing Unit |
| 中文描述： | 增強(qiáng)型時(shí)間處理單元的要點(diǎn) |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 93K |
| 代理商： | AN2353 |
The Essentials of Enhanced Time Processing Unit, Rev. 1
Channel Hardware
Freescale Semiconductor
2
microcontroller. This is in spite of a difficult architecture, less than ideal tools support, and serious
limitations in its ability to measure or drive very fast signals.
The Enhanced TPU was designed from the start to address the limitations of the TPU. It is not simply an
extension of the original, but a significant redesign based on that successful architecture (see chart below).
While TPU code will not run without modification on an eTPU, there is no function that cannot be ported.
Meanwhile, most of the known applications requirements that were out of the reach of the TPU can be
easily met by the eTPU.
The TPU was often made available in multiple units on a single microcontroller. Functions on the TPUs
had to be partitioned carefully, as there was no common data storage, timing, nor execution between the
modules. The eTPU is typically configured in an array of up to 64 channels, with two engines sharing a
common instruction memory, data memory, and debug interface. Timer buses can be shared, and any of
the 64 channels can signal any other. Mechanisms are provided for coherent data transfers between
channels, as well as between the CPU and the eTPUs.
The eTPU boasts improvements over the TPU in several major areas: the channel hardware, the memory,
the microengine, and the tools. Many of these improvements are outlined below, and each will be
examined in detail in future notes.
3
Channel Hardware
The TPU provided 16 identical channels each providing a capture register, which could be configured to
latch one of two 16-bit counter buses on a pin transition; and a compare register, which could force a pin
transition on a programmed match with one of the timer buses. The match or capture events could be used
to request service by the microengine, which could then reload the registers for the next event. While the
Table 1. Feature Comparison: TPU vs. eTPU
TPU
eTPU
eTPU Comments
Channels
16
32
Separate input & output per MCU
Channel Modes
2
13+
See channel details
Time Bases
2
2 of up to 10
Shared between all timer modules
Parameters
200-256 bytes
2–16 Kbytes
Defined per MCU
Code Memory
2–8 Kbytes
6–64 Kbytes
Shared between two eTPU engines
Defined per MCU
Fastest Thread
12 clocks
8 clocks
Max clock speed greater than 2x TPU
Register width
16 bits
24 bits
Top parameter byte is accessible
Angle Clock
Software
Yes
Software supported hardware
16x16 Multiply
34 clocks
6 clocks
Also DIV and MAC
Compiler
No
ISO C
3rd party source
Debugger
3rd Party
Yes
Multicore Nexus debugging
Depends on the device
Simulator
3rd Party
3rd Party
Also integrated into CodeWarrior
Depends on the device
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