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| 型號： | AN103 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | The FET Constant-Current Source/Limiter |
| 中文描述： | 場效應(yīng)管的恒流源/限制器 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 56K |
| 代理商： | AN103 |
AN103
Siliconix
10-Mar-97
3
CR470
CR430
CR390
CR360
CR330
CR300
CR270
CR240
CR220
CR200
CR180
CR160
SST/J504
SST/J503
SST/J502
J501
J500
P
0.1
0.2
0.5
1
2
5
10
I
F
– Regulator Current (mA)
Standard Series Current Regulator Range
Figure 6.
TO-18 2-Lead
Package
J = TO-226AA 2-Lead Package
SST = TO-236 (SOT-23) Package
I
F
V
F
SST/J510
SST/J509
SST/J508
SST/J507
SST/J506
SST/J505
SST/J511
Standard Two-Leaded Devices
Siliconix offers a special series of two-leaded JFETs with
a resistor fabricated on the device, thus creating a
current range. Devices are available in ranges from
1.6 mA (CR160) to 4.7 mA (CR470).
10%
For designs requiring a
offers devices rated from 0.24 mA typical (J500) through
4.7 mA typical (J511) in a two-leaded TO-226A (TO-92)
package. The SST502 series is available in surface mount
TO-236 (SOT-23).
20% current range, Siliconix
Each of these two-leaded devices can be used to replace
several typical components.
Figure 6 shows the current ranges of these two device
series. Further information is contained in the individual
data sheets appearing elsewhere in this data book or from
Siliconix FaxBack.
The CR160 series features guaranteed peak operating
voltage minimum of 100 V with a typical of 180 V. The
J500 series features 50 V minimum with a typical of
100 V. The lower current devices in both series provide
excellent current regulation down to as little as 1 V.
Bias Resistor Selection
All industry JFET part types exhibit a significant varia-
tion in I
DSS
and V
GS(off)
on min/max specifications and
device-to-device variations.
Using the simple source biasing current source as illus-
trated in Figure 1, the designer can graphically calculate
the R
S
which best fits the desired drain current I
D.
Figure
7 plotting I
D
versus V
GS
over the military temperature
range shows the resulting I
D
for different values of R
S
.
The R
S
lines are constructed by drawing the slope of the
R
S
desired value starting at the origin, eg. R
S
= 2 k slope.
Find a convenient point on the X – Y axis to mark a
V
GS
I
D
of 2 k such as V
GS
= –1.5 V and I
D
= 0.75 mA.
Then, draw a straight line from this point to the origin.
The intersection of this R
S
line and the device I
D
versus
V
GS
will be the operating I
D
. In this example, the result-
ing I
D
= 0.35 mA at T
J
= 25 C. The intercepts of the T
J
= –55 C and 125 C show the minimal variation with
temperature.
Also note that JFETs have a I
D
current where there is no
change with temperature variation. To achieve this T
C
,
the –V
GS
voltage (I
D
x R
S
) is approximately:
V
GS(0TC)
V
GS(off)
– 0.65 V
(11)
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