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參數(shù)資料
| 型號(hào)： | AN-90 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 74C Family Characteristics |
| 中文描述： | 74C條家庭特征 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大小： | 209K |
| 代理商： | AN-90 |
The 54C/74C family is designed so that the output character-
istics of all devices are matched as closely as possible. To
ensure uniformity all devices are tested at four output condi-
tions (see Figure 1 and Figure 2). These points are:
V
CC
= 5.0V
V
IN
= 5.0V
I
DS
≥
1.75 mA
V
DS
≥
5.0V
V
IN
= 10V
I
DS
≥
8.0 mA
V
DS
≥
10V
V
IN
= 0V
|I
DS
|
≥
1.75 mA
|V
DS
|
≥
5.0V
V
IN
= 0V
|I
DS
|
≥
8.0 mA
|V
DS
|
≥
10V
V
CC
= 10V
Note that each device data sheet guarantees these points in
the table of electrical characteristics.
The output characteristics can be used to determine the out-
put voltage for any load condition. Figure 1 and Figure 2
show load lines for resistive loads to V
for sink currents
and to GND for source currents. The intersections of this
load line with the drain characteristic in question gives the
output voltage. For example at V
CC
= 5.0V, V
OUT
= 1.5V
(typ) with a load of 500
to ground.
These figures also show the guaranteed points for driving
two 54L/74Lstandard loads.As can be seen there is typically
ample margin at V
CC
= 5.0V.
In the case where the 54C/74C device is driving another
CMOS device the load line is coincident with the I
= 0 axis
and the output will then typically switch to either V
CC
or
ground.
NOISE CHARACTERISTICS
Definition of Terms
Noise Immunity:
The noise immunity of a logic element is
that voltage which applied to the input will cause the output
to change its output state.
Noise Margin:
The noise margin of a logic element is the dif-
ference between the guaranteed logical “1” (“0”) level output
voltage and the guaranteed logical “1” (“0”) level input volt-
age.
The transfer characteristic of Figure 3 shows typical noise
immunity and guaranteed noise margin for a 54C/74C de-
vice operating at V
= 10V. The typical noise immunity
does not change with voltage and is 45% of V
CC
.
All 54C/74C devices are guaranteed to have a noise margin
of
1.0V
or
greater
over
(see Figure 4).
all
operating
conditions
AN006021-5
FIGURE 3. Typical Transfer Characteristics
www.fairchildsemi.com
2
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