參數(shù)資料
型號(hào)： AN-32
英文描述： TOPSwitch-GX Flyback Design Methodology
中文描述： 的TOPSwitch - GX系列反激式設(shè)計(jì)方法
文件頁(yè)數(shù)： 8/16頁(yè)
文件大小： 134K
代理商： AN-32
AN-32
8
B
12/02
Step 4. Determine reflected output voltage V
OR
and clamp
Zener voltage V
CLO
(Figure 8)
Set reflected output voltage, V
= 100 V for multiple
output, 120 V for single output. These values optimize
cross-regulation and efficiency. To obtain the maximum
output power from a given
TOPSwitch-GX
device, set
V
= 135 V.
RCD (Resistor/Capacitor/Diode) clamp may be used with
TOPSwitch-GX
when and only when current limit is set
externally with current limit reduction as a function of line
voltage. Compared to Zener clamps, designs using RCD
clamps usually have lower efficiency at light load. In
addition, great care must be taken in RCD clamp design.
Because of its inherent variation in clamp voltage across
load range, if not designed properly, an RCD clamp may
fail to protect
TOPSwitch-GX
, especially under startup or
output overload conditions.
Figure 7. Input Voltage Waveform.
Figure 8. Reflected Voltage V
OR
and Clamp Zener Voltage V
CLO
.
t
C
P
O
= Output Power
f
L
= Line Frequency
(50 or 60 Hz)
t
C
= Conduction Angle
Use 3 ms if unknown
η
= Efficiency
V
V
ACMIN
MIN
×
2
PI-2585-012500
V+
Universal/230 VAC Input
Use VOR = 120 V (100 V) and 180 V (150 V) Zener Clamp
For Single (Multiple) Output
PI-3336-091402
BVDSS
VOR = 120 V (100 V)
Margin = 53 V (95 V)
Blocking Diode Forward Recovery = 20 V
700 V
647 V (605 V)
495 V (475 V)
375 V
0 V
0 V
VCLO = 1.5 x VOR = 180 V (150 V)
VCLM = 1.4 x VCLO = 252 V (210 V)
VCLM
VCLO
VMAX
555 V (525 V)
627 V (585 V)
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