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參數(shù)資料
| 型號： | AN-136 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | A NEW GENERATION OF TAG SRAMS?THE IDT71215 AND |
| 中文描述： | 作為TAG SRAM的呢？IDT71215和新一代 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 103K |
| 代理商： | AN-136 |
9
A NEW GENERATION OF TAG SRAMS—THE IDT71215 AND IDT71216
APPLICATION NOTE AN-136
A
29
- A
18
A
31
- A
3
D
63
- D
0
A
17
- A
3
PENTIUM
μ
P
A
D
S
CHIP SET
CACHE READ
and WRITE
MAIN MEMORY READ/WRITE
BRDY
W/
R
RESET
BRDY
W/R
A
17
- A
5
TAG (11:0)
ADDR (12:0)
ADDR (13)
I/Os
ADDR
IDT71V432
32K x 32
DATA RAMS
IDT71215
TAG RAM
BRDYH
BRDYIN
BRDYH
BRDY
3
3
WES
WET
OET
WES
WET
OET
BRDYOE
CS
1
OES
PWRDN
PWRDN
MATCH
STATUS
STATUS
MATCH
STATUS
OUT
STATUS
IN
SFUNC
VARIOUS CONTROL SIGNALS
CS
2
V
CC
3176 drw 11
Figure 11: Pentium / 71215 Example of 256 KB Cache
When changing the depth of the cache (and Tag RAM), the
TAG field shifts accordingly, so that it remains contiguous with
the address field. The example in Figure 11 uses only half of
a 71215, and can be compared with Figures 1 and 12. It shows
a 256KB cache for the Pentium, uses the
BRDY
pass-through
option from Figure 10, and maps 1GB of main memory into the
cache. Two 32Kx32 burst SRAMs are shown as the cache
data RAM.
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