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參數(shù)資料
| 型號： | AN-05 |
| 英文描述： | SY69952 in an OC-3 Transmission System |
| 中文描述： | SY69952中的OC - 3傳輸系統(tǒng) |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 60K |
| 代理商： | AN-05 |
APPLICATION NOTE
AN-05
4
Micrel
LOOP FILTER ADJUSTMENT
This section is ONLY applicable if initial values of external
loop filters need to be adjusted for tuning the SY69952 to a
layout or for customer's desired jitter response. R1 and C1
Figure 4
Transmit Filter Recommended Values:
PLL1+, Pin 13, C1 = 0.1
μ
F,
PLL1
–
, Pin 14, R1 = 500
,
Optional PLL1+ and PLL1
–
, C2 = 47pF
Receive Filter Recommended Values:
PLL2+, Pin 16, C1 = 0.1
μ
F,
PLL2
–
, Pin 15, R1 = 120
,
Optional PLL2+ and PLL2
–
, C2 = 47pF
If Jitter Amplitude response adjustment is required the
following is an explanation of typical Loop Filter
characteristics.
Figure 5
R1, Then C1
C2
Jitter
Gain
(dB)
0.1
130kHz
-20db/decade
-20
Frequency
Acceptable
Range
C1
R1
C3
control response to Lower and Mid Range Modulation
Frequencies. And C2 (optional) controls the the response
to High Range Modulation Frequencies.
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