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| 型號(hào)： | AN-03 |
| 英文描述： | SONET OC-12 Jitter Measurement |
| 中文描述： | 與SONET OC - 12抖動(dòng)測(cè)量 |
| 文件頁數(shù)： | 5/6頁 |
| 文件大?。?/td> | 56K |
| 代理商： | AN-03 |
APPLICATION NOTE
AN-03
5
Micrel
JITTER TOLERANCE
Jitter Tolerance Definition
Bellcore TA-NWT-000253 (Issue 2), section 5.6.4.2:
“
For Category II SONET interfaces, jitter tolerance is defined
as the peak-to-peak amplitude of sinusoidal jitter applied on
the input OC-N/STS-N signal that causes a 1-dB power
penalty. This is a stress test intended to ensure that no
additional penalty is incurred under operating conditions.
”
Jitter Tolerance Requirement
Bellcore TA-NWT-000253 (Issue 2), section 5.6.4.2:
"OC-12 Category II SONET interface shall tolerate, as a
minimum, the input jitter applied according to the mask in
Figure 4 and 5, with the parameters specified in the figure for
OC-12."
Measuring Jitter Tolerance on the SY69712
On the SY69712 jitter tolerance is measured by applying
sinusoidal input jitter at the serial data input. Jitter tolerance
is measured at SDOUT (retimed data) with CKE622 (recovered
clock). Figure 6 shows the test setup for measuring jitter
tolerance.
Test Setup for Measuring Jitter Tolerance
on the SY69712
Figure 6
CH 2
Filter
SY69712
HP 70841B Pattern Generator &
HP 70311A Clock Source
CKE622
HP 3325B Synthesizer
Function Generator
HP 70820A Microwave Transition Analyzer &
HP 70004A Display
SDOUT
SDIN
622MHz Data
HP 70842B Error Detector &
HP 70004A Display
Modulation Source
Receive
(Recovered Clock & Data)
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