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參數(shù)資料
| 型號(hào)： | AMPAL22V10 |
| 廠商： | Advanced Micro Devices, Inc. |
| 元件分類： | PAL |
| 英文描述： | PAL22V10 Family, AmPAL22V10/A 24-Pin TTL Versatile PAL Device |
| 中文描述： | PAL22V10家庭，AmPAL22V10 / 24針的TTL多功能PAL制式設(shè)備 |
| 文件頁數(shù)： | 20/20頁 |
| 文件大?。?/td> | 184K |
| 代理商： | AMPAL22V10 |
AMD
2-216
PAL22V10 Family
POWER-UP RESET
The power-up reset feature ensures that all flip-flops will
be reset to LOW after the device has been powered up.
The output state will depend on the programmed pat-
tern. This feature is valuable in simplifying state ma-
chine initialization. A timing diagram and parameter ta-
ble are shown below. Due to the synchronous operation
of the power-up reset and the wide range of ways V
CC
can rise to its steady state, two conditions are required
to ensure a valid power-up reset. These conditions are:
I
The V
CC
rise must be monotonic.
I
Following reset, the clock input must not be driven
from LOW to HIGH until all applicable input and feed-
back setup times are met.
Parameter
Symbol
Parameter Description
Max
Unit
t
PR
Power-up Reset Time
1000
ns
t
S
Input or Feedback Setup Time
t
WL
Clock Width LOW
16559C-18
t
PR
t
WL
t
S
4 V
V
CC
Power
Registered
Active-Low
Output
Clock
See Switching
Characteristics
Power-Up Reset Waveform
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