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| 型號(hào)： | AMIS-710651-A4 |
| 英文描述： | Color CIS Module |
| 中文描述： | 彩色CIS模塊 |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 197K |
| 代理商： | AMIS-710651-A4 |
AMIS-710651-A4: Color CIS Module
Data Sheet
CLK
1 Pixel
50%
VOUT
90%
50%
Prt
TS
Figure 5: Pixel Timing
Table 6: Clock Timing Characteristics for Timing Diagrams
Parameter
Clock cycle time
Clock pulse width
Clock duty cycle
Prohibit crossing time SP
Data setup time
Data hold time
Signal delay time
Symbol
CLKp
CLKpw
tprh
Tset
Thold
tdl
Min.
250
30
20
25
Typ.
250
125
50
Max.
2000
50
Units
ns
ns
%
ns
ns
ns
ns
Signal settling time
Signal fall time
Notes:
(1)
(2)
tst
tsigf
130
60
ns
ns
All of the symbol definitions used in Table 6 are shown in the figures in Section 9.0. The clocks, CP and SP are compatible with CMOS clock drivers.
Maximum clock cycle time, as with minimum FREQ, must be consistent with maximum TINT. See Table 3, Note 3.
10.0 Maximum Ratings
Table 7: Maximum Ratings (Not to be Used for Continuous Operation)
Parameter
Power supply voltage
Input voltage
Ambient temperature
Symbol
VDD
VIN
Specification
3.3V
VDD
0 to 50
°
C
-10 to +75
°
C
0 to 80%
70
C
Note
SP & CP
TA (PCB surface)
Operational storage
Ambient humidity
Maximum operating case temperature
HA
Non-condensing
PCB temperature
6
AMI Semiconductor
– Aug. 06, M-20609-001
www.amis.com
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